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Alinco Dj-180, Dj-1400 Service Manual

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    							DJ-180  
    DJ-1400
    Service Manual
    CONTENTS
    SPECIFICATIONS PC BOARD VIEW
       1) General 2    1) VCO Unit 24
       2) Transmitter. 2    2) JACK Unit 24
       3) Receiver 2    3) PTT Unit Side B 24
       4) Functions for Each Version 3    4) PS Unit 25
    CIRCUIT DESCRIPTION    5) ROM1 Unit Side B 25
       1) Receiver System 4    6) ROM2 Unit Side B 25
       2) PLL VCO Circuit. 5    7) RF Unit Side A 26
       3) Transmitter System 5    8) RF Unit Side B 27
       4) DTMF Encoder Circuit (option). 6    9) CPU Unit Side A. 28
       5) Tone Squelch Circuit (option) 6   10) CPU Unit Side B 29
       6) Microprocessor and Peripheral Circuit 6   11) RE Unit 30
       7) Terminal Function of Microprocessor 7   12) CTCSS UniL 30
     SEMICONDUCTOR DATA   13) DTMF Unit. 31
       1) LR408721 10 PARTS LAST
       2) M5218FP 10      CPU unit 32
       3) M5236ML. 10      PS unit. 32
       4) MB1504LPF 11      ROM1 Unit 33
       5) MC3357 11      DTMF Unit 33
       6) MX365 12      RF Unit 33 ~ 36
       7) NJM386 13      Vco unit 37
       8) RH5VA32AA. 13      CTCSS Unit 37
       9) RH5VA45AA. 13      PTT SW Unit 38
       10) X24C01A 14      JACK Unit 38
       11) X24C04S14 14      RE Unit 38
       12) X24C16S14 14      Others 38
       13) Transistor, Diode and LED Outline Dra
    w15      ROM2 Unit. 38
       14) LCD Connection. 16      PACKING 38
    EXPLODED VIEW      Parts Table for Each Version. 39
       1) Rear Case 1 17 ADJUSTMENT
       2) LCD 17    1) Required Test Equipment. 40
       3) Rear Case 2 18    2) Before Adjustment 40
       4) Front Case 1 19    3) Adjustment for DJ180, DJ1400 41
       5) Front Case 2 20    4) Adjustment for DJ1400AN/QN 42
       6) Front Case 3 and Battery Terminal 21    5) Adjustment Quick Reference 43
       7) Ten Key Cover and Key Pad Panel 22    6) Adjustment Points. 43 ~ 44
       8) CTCSS Unit and ROM1 Unit 23
    CIRCUIT DIAGRAM  45 ~ 46
    BLOCK DIAGRAM 47
    ALINCO INCORPORATED
    TWIN 21 M.I.D. TOWER  BUILDING 23F, 1-61, 2-CHOME,
    SHIROMI CHUO-KU , OSAKA, 540-8580 JAPAN
    Tel (81)
    6-6946-8150 fax (81)6-6946-8175
    e-mail: [email protected] 
    						
    							SPECIFICATIONS
    DJ-180
    1) General
      Frequency Coverage:
    RX: 137.000 ~ 173.995MHz (T, TM version)
    TX: 144.000 ~ 147.995MHz (T, TM version)
    RX: 137.000 ~ 173.995MHz (TA, TB, TA2, TB2 version)
    TX: 137.000 ~ 173.995MHz (TA, TB, TA2, TB2 version)
    RX/TX: 144.000~145.995MHz(TS, TSA, TZ, E, EA, EB version)
      Frequency Resolution: 5, 10, 12.5, 15, 20, 25kHz steps
      Memory Channels: 10 Channels (standard)
      Antenna Impedance: 50 ohm unbalanced
      Signal Type: F3E(FM)
      Power Supply Requirement
    :DC 5.5V~13.8V (Rated 7.2V Ni-Cd)
      Dimensions: Approximately 132(H) x 58(W) x 33(D) mm
      Weight : Approximately 350g
    2) Transmitter
      Output Power.I 5.0W with Optional 12V Ni-Cd Battery
    2.0W with Standard 7.2V Ni-Cd Battery
    (144.000~147.995MHz)
    (160.000~165.000MHz)... TA2, TB2 only
      Modulation System: Variable Reactance Frequency Modulation
      Max. Frequency Deviation: +/ -5kHz
      Tone Frequency: 67.0 to 250.3Hz -38 Subaudible Encoding Tones
    (E, EA, EB version: option)
      DTMF Encoder: (TZ, EB version: option)
      Tone Burst: (E, EA, EB version only)
    3) Receiver
      Receiver System: Double-Conversion Superheterodyne
      Intermediate Frequency. 1st IF: 21.4MHz
    2nd IF: 455kHz
      Sensitivity: 12dB SINAD less than -10dBu
    (144.000~17.995MHz)
    (160.000~165.000MHz)... TA2, TB2 only
    Page 2 
    						
    							SPECIFICATIONS
    DJ-1400QN / AN (The Narrow Version)
    1) General
      Frequency Coverage:
    136.000 ~ 155.000MHz (AN version)
    150.000 ~ 173.995MHz (QN version)
      Frequency Resolution: 5, 10, 12.5, 15, 20, 25kHz steps
      Memory Channels: 10 Channels (standard)/option 50 and 200ch
      Antenna Impedance: 50 ohm unbalanced
      Signal Type: F3E(FM)
      Power Supply Requirement
    :DC 5.5V~13.8V (Rated 7.2V Ni-Cd)
      Dimensions: Approximately 132(H) x 58(W) x 33(D) mm
      Weight : Approximately 350g
    2) Transmitter
      Output Power.I 5.0W with Optional 12V Ni-Cd Battery
    2.0W with Standard 7.2V Ni-Cd Battery
      Modulation System: Variable Reactance Frequency Modulation
      Max. Frequency Deviation: +/ -2.5kHz
      Tone Frequency: 67.0 to 250.3Hz -38 Subaudible Encoding Tones
    Time Out Timer 0 to 450 sec
    Time Out Penalty 0 to 15 sec
    3) Receiver
      Receiver System: Double-Conversion Superheterodyne
      Intermediate Frequency. 1st IF: 21.4MHz
    2nd IF: 455kHz
      Sensitivity: 12dB SINAD less than -16dBu
    AF Output 200mW (10% THD)
    Page 2-1 
    						
    							4) Functions for Each Version
    RX
    Frequency
    RangeTX
    Frequency
    Range(factoTone
    Burst CTCSS DTMF BANDFinal
    Operatio
    n
    DJ-180T 130~174 144~148 x O O R+LA
    DJ-180TA 130~174 130~174 x O O R+LA
    DJ-180TA2 130~174 130~174 x O O H R+LA
    DJ-180TB 130~174 130~174 x O O R+LA
    DJ-180TB2 130~174 130~174 x O O H R+LA
    DJ-180TM 130~174 144~148 x O O R+LA
    DJ-180TS 144~146 144~146 x O O R
    DJ-180TSA 144~146 144~146 x O O R
    DJ-180TZ 144~146 144~146 x O x
    (with16keys)R
    DJ-180E 144~146 144~148 O A
    (option)OR
    DJ-180EA 144~146 144~146 O A
    (option)OR
    DJ-180EB 144~146 144~146 O A
    (option)xR
    DJ-1400 130~174 130~174 x O x R+LA
    DJ-1400A 130~174 130~174 x O x R+LA
    DJ-1400B 130~174 130~174 x X x R+LA
    DJ-1400F 130~174 130~174 x O x R+LA
    DJ-1400G 130~174 130~174 x X x R+LA
    DJ-1400TM 130~174 130~174 x O x R+LA
    DJ-1400AN 136~155 130~174 x O x R+LA
    DJ-1400QN 150~174 130~174 x O x R+LA
     Final Operation
    R:
    Press and hold the F key and turn on the radio.
    R+LA:Press and hold the F and LAMP keys and turn on the radio.
    Note: The expanded frequency will return to the initial setting if you reset the radio with..R operation after
    R + LA operation. To resume the expanded frequency . reset the radio again with..R + LA
    operation.
    Page 3
      Function
    Version 
    						
    							CIRCUIT DESCRIPTION
    1) Receiver System
    The receiver system is the double superheterodyne.
    The first IF is 21.4MHz andthe second IF is 455kHz.
     1. Front End The signal from the antenna is passed through a low-pass fitter and input to
    the RF coil L4.
    The signal trom L4 is amplified by Q1 and led to the band passtilter (L5, L6,
    L7), and led to the first mixer gate of Q2.
     2. First Mixer The amplified signal (fo) by Q1 is mixed with the first local oscillator signal
    (fo -21.4MHz) from the PLL circuit by the first-stage mixer Q2 and so is
    converted into the first IF signal.
    The unwanted frequency band of the first IF signal is eliminated by the
    monolithic crystal filter (XF1), and led to IF amplifier Q3.
     3. IF Amplifier The first IF signal is amplified by Q3, and inputto pin16 of IC1, where it is
    mixed with the second local oscillator signal (21.855MHz) and so is con-
    verted into the second IF signal (455kHz).
    The second lF signal is output from pin3 of IC1, and unwanted frequency
    band of the second lF signal is eliminated by a ceramic filter (FL1).
    The resulting signal is then amplified by the second lF limiting amplifier, and
    detected by quadrature circuit. The audio signal is output from ping of IC1.
     4. Audio Circuit The detected signal from IC1 is passed through the low-pass filter and led to
    the flat amplifier Q13. When the optional Tone Squelch unit is equipped, the
    tone signal is eliminated by lC701.
    Q13 is switched ON/OFF by AFC slgnal from CPU.
    The audio signal is input to the main volume (VR3) and amplified by the
    power amplifier IC3 to drive the speaker.
    The power supply voltage of IC3 is limited by AF regulator consisting of Q14
    and Q15 to prevent the speaker from overdriving. The power supply voltage
    of IC3 is switched ON/OFF by AFP signal.
    5. Squelch Circuit The noise in the audio signal from IC1 is passed through the squelch control
    variable resistor (VR4) and input to pin10 of IC1. The audio signal is ampli-
    fied by filter amplifier of IC1 and output to pin11. The desired noise of the
    audio signal is eliminated by the high-pass filter and amplified by Q12. The
    resulting signal is rectified by D13 and then input to pin12 of IC1. When the
    squelch circuit is close, pin13 of ICl goes to low. When the squelch circuit
    is open or a signal is received, pin13 goes to high, then the signal of pin13
    is led to CPU.
    Page 4 
    						
    							2) PLL, VCO Circuit
    Output frequency of PLL circuit is set by the serial data (pin9: clock, pin10:
    data, pin11 : toad enable) from microprocessor.
    PLL circuit consists of VCO Q201, buffer amplifier Q202 and Q17.
    When PLL is locked, pin7 of IC2 goesto high and UNLOCK SW Q19
    becomes OFF, then T.MUTE signal goes to low.
    The pulse wave output of charge pump is converted to DC voltage by PLL
    loop filter circuit, and supplied to D201 , D202 of varicap diode in VCO unit.
    The VCO tune voltage is applied to the varicaps D3, D4, D5 and D6 in the
    frontend.
    The frequency modulation is executed when the audio signal voltage is
    supplied to the varicaps D201, D202 and D203.
    3) Transmitter System
     1. Microphone The voice from the internal or external microphone is led to the pre-empha-
      Amplifier sis circuit, and then input to the microphone amplifier IC4, which consists of
    two operational amplifiers.
    The amplified signal is input to the low.pass filter lC4.
    The output from the microphone amplifier is passed through variable resis-
    tors VR2 tor modulation adjustment to varicap diode of the VCO, contromng
    the VCO frequency.
     2. Power Amplifier The signal from VCO is amplified by buffer amplifiers Q4 and Q5, and input
    to the buffer amplifiers Q6 and input to the power amplifier Q7. The amplified
    signal is output from Q7, and then passed through the low-pass filter, the an-
    tenna switch circuit and the output low-pass tilter. The unwanted harmonies
    frequency signal is eliminated by the low-pass fitter and input to the antenna.
    The LC matching circuits located between amplifiers of the transmitting
    circuit make the transmission smooth.
     3. Automatic Power
      Control Circuit The automatic power control(APC) circuit is used to obtain a stable transmis-
    sion power. This circuit detects the transmission power by D8 in the low-
    pass filter consisting of L18, L19, C59, and C64. The detected DC voltage is
    supplied to APC circuit. When the detected voltage goes higher than the
    settled voltage, the bias voltage of APC amplifier Q9 goes to low. The
    collector voltage of APC amplifier Q10 goes to low and the power supply
    voltage of Q5 goes to low, and output power becomes small to prevent from
    the over power.
    At low power the Power Control Switch Q8 lets the base voltage of APC
    DET Q11 and the collector voltage of APC AMP Q10 down, also switches
    between high power and low power, and inhibits the transmission.
    Page 5 
    						
    							4) DTMF Encoder Circuit (option)
    The DTMF signal corresponding to the combination of the column and row is
    output from tone output pin17 of IC401 Encoder, producing a frequency-
    modulated RF output. The Q401 switches the DTMF Encoder when lC401 is
    active during DTMF transmission.
    5) Tone Squelch Circuit (option)
     1.Decoder
    The second IF signalfrom pin11 of IC1, and input to the tone squelch
    decoder lC701.
    When the tone squelch decoder IC701 decodes the input tone signal fre-
    quency as the programmed frequency, pin13 goes to Low. The signal is
    input to pin16(DET) of lC107, and the squelch goes off.
    When the Tone squelch decoder IC701 does not decode the input tone
    signal frequency as the programmed frequency, pin13 goes to High.
    2. Encoder
    The tone signal is output from pin16 of IC701, producing a frequency-
    modulated RF output.
    6) Microprocessor (CPU) and Peripheral Circuit
    Refer to Terminal Function of Microprocessor about each terminal func-
    tion.
    1, BS Mode When the Squelch is closed for more than 5 seconds, the radio goes into the
    BS(Battery Save) mode automatically. Pin11 (R5C) and pin19 become High
    or Low periodically. Open the Squelch, and the radio does not go into the
    BS mode.
    2. Backup Reset
    When the voltage detector circuit lC303 detects a decrease in the C5V line,
    CPU RAM data is stored in the EEPROM IC, IC601. IC 302 is also the
    voltage detector circuit and it detects the lower voltage than IC303. The
    circuit detects a increase in the C5V line when power is turned on, and then
    the CPU will be initialized.
    3. Reset
    Press and holdthe.F key, then turn on the power. The radio will reset to 
    initial factory settings.
    Even if you expanded the frequency, it will return to the initial setting. To
    resume the expanded frequency, press and hold the F and Lamp keys,
    then turn on the power.
    Page 6 
    						
    							7) Terminal Function of Microprocesser
    Name I/O Description PinNo. PinName H L
    TBST O 1750Hz Tone Burst Output 9 P57/PWM3Normal:H(HiZ) Output:Pluse
    BEEP O Beep Tone Output 10 P56/PWM2 Normal:H(HiZ) Output:Pluse
    R5C O RX5V ON/OFF 11 P55/PWM1 ON OFF
    T5C O TX5V ON/OFF 12 P54/PWM0 ON OFF
    AFP O AF Power Amplifier ON/OFF 13 P53/SIG ON OFF
    AFC O IF Mute Output 14 P52/CNT2 Mute OFF Mute ON
    M.MUTE O Microphone Mute Output 15 P5l/CNT1during Tone Burst
    Tansmission Normal
    RE1 I Rotary Encoder Input 1 16 P50/INT3
    LAMP O Lamp ON/OFF Switch 17 P37/SRDY ON OFF
    BAT I Battery Low lndicator Input 18 P36/CLK Low Normal
    P5C O PLL Power ON/OFF 19 P35/SOUT ON OFF
    EICD I EEPROM Unit Detection 20 P34/SIN Equipped Nothing
    XWR I External EEPROM Write Cycle Detection 21 P33rr Normal Write cycle
    RE2 I Rotary Encoder Input 2 22 P32/INT2
    SCOM O Band Plan Scan Output 23 P3l/XCIN H(Hiz) Low Active
    P.H/L O Transmit Power Switch 24 P30/XCOUT Low Power High Power
    BU I Back up Mode Input 25 INT1 Normal Negative Edge Triggered
    26 CNVss
    RES I Reset Input 27 RESET at Work on Reset
    Clock Input 3.58MHz 28 XIN
    Clock Output 3.58MHz 29 XOUT
    Ground 30 Vss
    TSQD I Tone Detecton Input 31 P17 Undetected Detected
    TICD I Tone Unit Detection 32 P16 Nothing Equipped
    BP1 I Band Plan(TX) 33 P15 Expanded Normal
    BP2 I Band Plan(RX) 34 P14 Expanded Normal
    BP3 I Band PIan(TX,RX) 35 P13 Expanded Normal
    BP4 I Band Plan(Channelstep) 36 P12 Expanded Normal
    BP5 I Band Plan(OffsetFreq.) 37 P11 Expanded Normal
    CH I Band Plan(ChanneIDisp.) 38 P10 Expanded Normal
    SLC O CIock for EEPROM IC 39 P07 Normal:Hiz Output: Pluse
    SDA I/O Data for EEPROM IC 40 P06 Normal:Hiz Output: Pluse
    CLK O Clock for PLL,TONE IC 41 P05 Output:Pluse Normal:L
    DTA O Data for PLL,TONE IC 42 P04 Output:Pluse Normal:L
    STB1 O Strobe for PLL IC 43 P03 Output:Pluse Normal:L
    STB2 O Strobe for TONE IC 44 P02 Output:Pluse Normal:L
    FUNC I Function Key Input 45 P0l OFF ON
    SD I Signal Detection Input 46 P00 Received Nothing
    TBST I Tone Burst Key Input 47 P27 OFF ON
    CALL I CALL(APO) 48 P26 OFF ON
    LAMP I LAMP (FLJPL) 49 P25 OFF ON
    MONI I MONl(P.H/L) 50 P24 OFF ON
    TONE I TONE(MW) 51 P23 OFF ON
    V/M I V/M(OFFSET) 52 P22 OFF ON
    T.SCAN I T.SCAN(CH STEP) 53 P2l OFF ON
    PTT I PTT Key Input 54 P20 OFF ON
    55 VL3
    56 VL2
    57 VL1
    COM0 O Common Output 58 COM0
    COM1 O Common Output 59 COM1
    COM2 O Common Output 60 COM2
    61 COM3
    SEG0 O Segment Output 62 SEGO
    SEG1 O Segment Output 63 SEGl
    SEG2 O Segment Output 64 SEG2
    SEG3 O Segment Output 65 SEG3
    SEG4 O Segment Output 66 SEG4
    SEG5 O Segment Output 67 SEG5
    SEG6 O Segment Output 68 SEG6
    SEG7 O Segment Output 69 SEG7
    SEG8 O Segment Output 70 SEG8
    SEG9 O Segment Output 71 SEG9
    SEG10 O Segment Output 72 SEG10
    SEG11 O Segment Output 73 SEG11
    SEG12 O Segment Output 74 SEG12/P43
    SEG13 O Segment Output 75 SEG13/P42
    SEG14 O Segment Output 76 SEGl4/P4l
    SEG15 O Segment Output 77 SEG15/P40
    SEG16 O Segment Output 78 SEG16/IN7
    SEG17 O Segment Output 79 SEG17/IN6
    SEG18 O Segment Output 80 SEG18/IN5
    SEG19 O Segment Output 1 SEG19/lN4
    SEG20 O Segment Output 2 SEG20/IN3
    SEG2l O Segment Output 3 SEG21/IN2
    SEG22 O Segment Output 4 SEG22/IN1
    SEG23 O Segment Output 5 SEG23/IN0
    Ground 6 AVss
    +4V 7 Vref
    +4V 8 Vcc
    Page 7 
    						
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