Daewoo Dtf 2950 Service Manual

							CP-850FX Service Manual 
 
Europe R&D 
60  
5.5.8  OVER CURRENT PROTECTION 
In case of overload, the SMPS secondary voltages will drop. The voltage on pin 5 of  
microcontroller changes Low to High. The controlling software which continuously monitors this 
voltage will switch the set to stand by mode. To power on the set again the user must switch it off 
using the main power switch. Appropriate hysteresis guaranty a reliable operation. 
 
5.6 TELETEXT DISPLAY
 
National character option bits C12, C13, C14 are transmitted in the page header of a given 
teletext page. The national option bits are intended to change (or exchange) 13 characters within 
the G0 character set, according to the needs of each national language.  
These codes represent, for a given broadcaster, the intended language that the teletext page 
should be displayed in. As there are only 3 bits, there are only 8 codes available to cover all the 
possible language combinations. This means that for a received code there are several 
possibilities meanings, according to the local code of practice.  
 
This is not as bad as it first seems, as we use the user-selected OSD language to identify the 
intention of the broadcaster. For example, a user wishing to see Russian teletext should select 
Russian OSD language, otherwise he would not have correct teletext display on the TV. 
The table below allows the reader to understand the relationship between selected OSD 
language (which is under user control), the teletext language display (selected by national option 
bits in transmission page header) and the Packet 26 language selection (selected within packet 
26 of the transmission page). 
 
An example: For Greek teletext display, (if national option code 1 1 1 is received from the 
broadcaster), the user should select the Greek OSD language. Even if English, French, German, 
Italian, Spanish, Dutch, Danish, Finnish, Norwegian or Swedish OSD languages are selected, 
the teletext will be correctly displayed. 
However, if Polish, Hungarian, Czech, Slovakian, Rumanian or Russian OSD are selected, the 
consequence will be incorrect teletext display for the national option characters. Romanian 
national font options will be selected. 
 
						

							CP-850FX Service Manual 
 
Europe R&D 
61  
OSD Language C12 C13 C14 PRIMARY 
LANGUAGE Secondary Language X26 Language
0 0 0  English  English  West Euro 
0 0 1  German  German  West Euro 
0 1 0  Scandinavian  Scandinavian  West Euro 
0 1 1  Italian  Italian  West Euro 
1 0 0  French  French  West Euro 
1 0 1  Spanish  Spanish  West Euro 
1 1 0  Turkish  Turkish  West Euro 
English, French, 
German, Italian, 
Spanish, Dutch, 
Danish, Finnish, 
Norwegian, 
Swedish, Greek 
1 1 1  Greek  English  Greek 
0 0 0  Polish  Polish  East Euro 
0 0 1  German  German  West Euro 
0 1 0  Hungarian  Hungarian  East Euro 
0 1 1  Italian  Italian  West Euro 
1 0 0  French  French  West Euro 
1 0 1  Serbian  Serbian  East Euro 
1 1 0  Czech  Czech  East Euro 
Polish, 
Hungarian, 
Czech, 
Slovakian, 
Rumanian 
1 1 1  Rumanian  Rumanian  East Euro 
0 0 0  English  Russian  Cyrillic 
0 0 1  German  German  West Euro 
0 1 0  Estonian  Estonian  East Euro 
0 1 1  Lettish  Lettish  East Euro 
1 0 0  Russian  English  Cyrillic 
1 0 1  Ukrainian  English  Cyrillic 
1 1 0  Czech  Czech  East Euro 
Bulgarian, 
Russian 
1 1 1  Rumanian  Rumanian Cyrillic 
5.7 SOUND PROCESSING 
5.7.1  ANALOGUE SOUND IF - INPUT  SECTION 
The input pins ANA_IN1+ and ANA_IN- offer the possibility to connect sound IF sources to the 
MSP 341xG. The analogue-to-digital conversion of the preselected sound IF signal is done by an 
A/D converter, whose output is used to control an analogue automatic gain circuit (AGC), 
providing an optimal level for a wide range of input levels. 
 
5.7.2 QUADRATURE MIXERS 
The digital input coming from the integrated A/D converter may contain audio information at a 
frequency range of theoretically 0 to 9 MHz corresponding to the selected standards. By means 
of two programmable quadrature mixers, two different audio sources ; for example, NICAM and 
FM-mono, may be shifted into baseband position. 
 
5.7.3  PHASE AND AM DISCRIMINATION 
The filtered sound IF signals are demodulated by means of the phase and amplitude 
discriminator block. On the output, the phase and amplitude is available for further processing. 
AM signals are derived from the amplitude information, whereas the phase information serves for 
FM and NICAM demodulation. 
 
 
						

							CP-850FX Service Manual 
 
Europe R&D 
62 5.7.4 NICAM DECODER 
In case of NICAM - mode, the phase samples are decoded according the DQPSK - coding 
scheme. The output of this block contains the original NICAM bitstream. 
 
5.7.5 DSP SECTION 
All audio baseband functions are performed by digital signal processing (DSP). The DSP section 
controls the source and output selection, and the signals processing. 
 
5.7.6  SOUND MODE SWITCHING 
In case of NICAM transmission, the controlling software read the bit error rate and the operation 
mode from the NICAM Decoder. When the set is in “Auto detection” mode ( default mode after 
ATSS ) the MSP firmware set automatically the sound mode ( NICAM mono, NICAM Dual 1 or 
NICAM Dual 2 ) depending on the transmitted mode. 
In case of 2 Carrier FM transmission, the MSP firmware read the transmission mode and the 
signal quality level from the Stereo Detection Register. When the set is in “Auto detection” mode 
the firmware set automatically the sound mode ( mono, Stereo, Dual 1, Dual 2 ) depending on 
the transmitted mode. 
In “Auto detection” mode the firmware evaluate the signal quality and automatically switch to the 
analogy sound carrier 1, if the transmission quality is too poor. To avoid unwanted automatic 
switching the threshold levels mono to stereo and stereo to mono is different. 
When the sound mode change, the MSP firmware informs the microcontroller by rising pin 4. 
This generates an interrupt to the controller, which then read MSP registers via I2C bus to know 
the new sound status, and update OSD when needed. 
In “forced mono “ mode ( locker icon ), the controlling software configure the MSP341xG to 
demodulate only the analogue (FM or AM)  sound carrier 1, no matter the signal quality. The 
sound mode “ forced “ or “ Autodetect” is stored for each programme. 
 
5.8 SOUND AMPLIFICATION
 
The TDA8946J is a stereo BTL audio amplifier capable of delivering 2 x 15 W output power to an 
8 Ω load at THD = 10%, using a 18 V power supply and an external heatsink. The voltage gain is 
fixed at 32dB. 
 
With the three-level MODE input the device can be switched from ‘standby’ to ‘mute’ and to 
‘operating’ mode. 
The TDA 8946J outputs are protected by an internal thermal shutdown protection mechanism 
and short-circuit protection. 
 
5.8.1 POWER AMPLIFIER 
The power amplifier is a Bridge Tied Load (BTL) amplifier with an all-NPN output stage, capable 
of delivering a peak output current of 1.5 A. 
The BTL principle offers the following advantages : 
- Lower peak value of the supply current. 
- The ripple frequency on the supply voltage is twice the signal frequency. 
- No DC-blocking capacitor 
- Good low frequency performance 
 
 
						

							CP-850FX Service Manual 
 
Europe R&D 
63 5.8.2 MODE SELECTION 
The TDA8946J has several functional modes, which can be selected by applying the proper DC 
voltage to pin MODE. 
 
Mute : In this mode the amplifier is DC biased but not operational (no audio output). This allows 
the input coupling capacitors to be charged to avoid pop-noise. The devices is in mute mode 
when 2.5 V < V
MODE < (Vcc-1.5 V). 
 
Operating : In this mode the amplifier is operating normally. The operating mode is activated at 
V
MODE < 0.5 V. 
 
5.9 VERTICAL DEFLECTION
 
The vertical driver circuit is a bridge configuration. The deflection coil is connected between the 
output amplifiers, which are driven in phase opposition. The differential input circuit is voltage 
driven. The input circuit is especially intended for direct connection to driver circuits which deliver 
symmetrical current signals, but is also suitable for asymmetrical currents. The output current of 
these devices is converted to voltages at the input pins via resistors R350 and R351. The 
differential input voltage is compared with the output current through the deflection coils 
measured as voltage across R302, which provides internal feedback information. The voltage 
across R302 is proportional to the output current. 
5.9.1 FLYBACK VOLTAGE 
The flyback voltage is determined by an additional supply voltage V
flb. The principle of operation 
with two supply voltages (class G) makes it possible to fix the supply voltage Vp optimum for the 
scan voltage and the second supply voltage V
flb optimum for the flyback voltage. Using this 
method, very high efficiency is achieved. The supply voltage V
flb is almost totally available as 
flyback voltage across the coil, this being possible due to the absence of a coupling capacitor. 
5.9.2 PROTECTION 
The output circuit has protection circuits for : 
- Too high die temperature 
- overvoltage of output stage A 
5.9.3 GUARD CIRCUIT 
The guard signal is not used
 by the video IC to blank the screen in case of fault condition. 
5.9.4  DAMPING RESISTOR  
For HF loop stability a damping resistor (R331 & R332) is connected across the deflection coil. 
5.9.5 EAST-WEST AMPLIFIER 
The East-West amplifier is current driven. It can only sink currents of the diode modulator circuit. 
A feedback resistor R397 is connected between the input and output of this inverting amplifier in 
order to convert the East-West correction input into an output voltage. 
 
 
						

							CP-850FX Service Manual 
 
Europe R&D 
64 5.10  POWER SUPPLY (STR-W6754) - Functions of Each Terminal
 
5.10.1 Vcc Terminal (Pin 4) 
5.10.1.1 Start-up Circuit 
The start-up circuit detects Vcc terminal (No.4 pin) voltage, 
and makes a control IC start and stop. The power supply of the 
control IC (Vcc terminal input) employs a circuit as shown in 
Fig.1.  At start-up, C3 is charged through a start-up resistor R2.  
The R2 value needs to be set more than the holding current of 
the latch circuit (150µA Max), which is described later, to be 
flown at the minimum AC input.  
However, where the R2 value is too high, the current charging 
to C3 shall be reduced after AC input.  Consequently, it takes 
much time to reach the operation start-up voltage, so it is 
required to monitor the capacity of C3 that is mentioned later 
simultaneously.  The Vcc terminal voltage falls immediately 
after the control circuit starts its operation; however the voltage 
drop is reduced by the increase of the C3 capacity.  Therefore, 
even if the auxiliary drive winding voltage is delayed in rising, 
the Vcc terminal voltage does not fall up to the operation stop voltage to maintain the start-up 
operation.  However, with larger capacity of C3, it takes much time, after AC input, to reach the 
operation start since the certain time is required to charge C3.  In general, SMPS performs its 
operation properly with the value, C3 is 10 to 47µF, R2 is 47k to 150k Ohm for 100V wide input, 
and 82K to 330K Ohm for 200V narrow input for its start up.  
 
As shown in Fig.2, the circuit current which makes 
the control circuit start is regulated at 100µA MAX 
(Vcc = 15V, Ta = 25C), and higher value resister R2 
is applicable to the circuit.  Once the Vcc terminal 
voltage reaches 18.2V (TYP), the control circuit starts 
its operation by the Start-up Circuit, and current 
consumption shall be increased.  Once the Vcc 
terminal voltage falls and it becomes lower than the 
operation stop voltage 9.6V (TYP) with the decrease 
of the Vcc terminal voltage, Under Voltage Lock Out 
(UVLO) circuits stops the controlling operation and 
returns to the start-up mode. 
D
P
D2
D
V
1
S/GNDR2
C3
図1起動回路
STR -W6700
4
3CC
Ｉ
Ｖ( MA X ) 100μA
(TY P )
(TY P )
15V
図２V端子電圧－回路電流 Ｉ
9.6V
CC
CC
CCCC
18 .2V
Fig.1.  Start-up Circuit 
Fig.2.  VCC Terminal Vol. – Circuit Cur. ICC 
 
						

							CP-850FX Service Manual 
 
Europe R&D 
65 5.10.1.2 Auxiliary/Drive Winding 
After the control circuit starts its operation, the power 
supply is gained by rectifying and smoothing the 
voltage of the auxiliary winding D.
  
 Fig.3 shows the start-up voltage waveform of the 
Vcc Terminal.  The auxiliary winding voltage does  
not rise up to the set voltage after the control circuit 
starts its operation, and the Vcc terminal voltage 
starts falling.  However, because the operation stop 
voltage is set as low as 10.6V(Max), the auxiliary 
winding voltage D reaches stabilizing voltage before 
falling to the operation 
stop voltage, and the control circuit continues its operation. 
The auxiliary winding voltage, at the normal power 
supply operation, is to be set the number of windings 
for both the ends voltage of C3 to be higher than the operation stop voltage [Vcc(OFF) 
10.6V(MAX)] and lower than the OVP operation voltage [Vcc(OVP) 25.5V(MIN)]. 
 
Besides, in an actual power supply circuit, the Vcc terminal voltage might be varied by the value 
of secondary output current as shown in Fig.4.  This is caused by the small circuit current of 
STR-W6700 itself and C3 is charged up to the peak value by the surge voltage generated 
instantly after the MOSFET is turned OFF.  
In order to prevent this, it is effective to add a 
resistor having several to several tens ohms (R7) in 
series to a rectifier diode as shown in Fig.5.  The 
optimum value of the additional resistor should be 
determined in accordance with the specs of a 
transformer since the Vcc terminal voltage is varied 
by the structure difference of transformers. 
Furthermore, the variation ratio of the Vcc terminal 
voltage becomes worse due to an inaccurate 
coupling between primary and secondary windings 
of the transformer (the coupling between the 
auxiliary winding D and the stabilizing output 
winding for the constant voltage control).  Thus, for 
designing the transformer, the winding position of 
the auxiliary winding D needs to be studied carefully. 
 
 
 
 
 
補助巻線電圧
制御回路動作開始
時間Vin(AC)→ON
V
(TY P )
( MA X )
起動不良時
図 ３ 起動時 Ｖ 端子電圧波形例
10 .6V
CC
18 .2V
CC
V
Ｉ
D D2V
追加
S/GNDR7
が無 い場合
R7が有 る場合
R7
C3
図 ５ 出力電流Iou tの影響 を受 け に く い
補助電源回路 図 ４ 出力電流
Iou t-V端子電圧
ou t
STR -W6700
3
4CC
CC
CC
Fig.3. Waveform of VCC Terminal Vol. at Start-up 
Control Circuit Operation Start 
Aux. WindingVol.
Operation Failure 
Time 
Fig.4. Output Current IOUT – VCC Terminal Vol. 
Without R7 
With R7 
Fig.5. Auxiliary Power Supply Circuit 
not affected by Output Current 
IOUT
Addition 
 
						

							CP-850FX Service Manual 
 
Europe R&D 
66 5.10.1.3 Overvoltage Protection Circuit 
Where the voltage exceeding 27.5V(TYP) is imposed on between Vcc and GND terminals, the 
OVP circuit of the control IC starts its operation and turns latch-mode, and the control IC stops its 
oscillation.  Generally, the Vcc terminal voltage is supplied from the auxiliary winding of the 
transformer, and the voltage is in proportion to the output voltage; thus, the circuit also operates 
at that time when the overvoltage output of the secondary side comes out such as the voltage 
detection circuit open.  
  
The secondary output voltage at the Overvoltage Protection circuit operation is obtained form the 
following formula: 
 
） Ｖ（
端子電圧 通常動作時通常動作時出力電圧
≒TYP 5 . 27 ) Vout(OVP×CCOUTVV V ･･････(1)式                      VOUT at Normal Operation 
V
OUT (OVP) ≒ ---------------------------------------------------------  X  27.5V (TYP)  …… (1) 
               Vcc Terminal Voltage at Normal Operation 
 
						

							CP-850FX Service Manual 
 
Europe R&D 
67 5.10.1.4   Latch Circuit 
The latch circuit is a circuit that holds the oscillator output low and stops the power supply circuit 
operation when OVP or OLP circuit operates.  The holding current of the latch circuit is 150µA 
MAX (Ta = 25C) when the Vcc terminal voltage is minus 0.3V to the operation stop. 
In order to avoid improper operations caused by noises, etc., the delay-time is provided with a 
timer circuit incorporated in the HIC, and thereafter, the latch circuit starts its operation when 
OVP or OLP circuit operates for more than the set time.  While, the Vcc terminal voltage drops 
even after the latch circuit starts its operation because the constant voltage (Reg) circuit of the 
control circuit continues its operation with higher circuit current. 
Where the Vcc terminal voltage falls lower than the operation stop voltage (9.6V(TYP)), the 
voltage starts rising as the circuit current becomes lower than 150µA (Ta = 25C).  Where the Vcc 
terminal voltage reaches the operation start voltage (18.2V(TYP)), it falls as the circuit current is 
increased again.  Consequently, the latch circuit prevents the 
Vcc terminal voltage from rising abnormally by controlling the 
voltage between 9.6V (TYP) and 18.2V(TYP).  The Fig.6 
indicates the voltage waveform when the latch circuit is under 
operation.  The latch circuit operation is cancelled by reducing 
the Vcc terminal voltage below 7.3V (TYP), and generally, it is 
restarted by AC input switch-off of the power supply. 
 
5.10.2 SS/OLP Terminal (Pin 5) 
The operation of SS/OLP terminal is classified as Soft-Start 
and Overload Protection, and the SS/OLP terminal is generally 
connected to a condenser having the value of 0.47µF to 3.3µF. 
  
5.10.2.1 Soft-Start Operation at Start-up of Power Supply 
At the power supply start-up, an external 
condenser is charged up to the threshold 
operating charging voltage (VSSOLP(SS)) by 
the Soft-Start operating charging current 
(ISSOLP(SS)) flowing from SS/OLP.  The 
Soft- Start is provided at power supply start-up 
by utilizing the changing of SS/OLP terminal 
voltage from 0V to 1.0V.  The timing chart of 
the Soft-Start is shown in Fig.7.  Comparing 
the oscillation waveforms between OLP 
terminal voltage and the oscillation waveform 
of the internal control part, the Soft-Start widen 
the ON width.  Besides, at the burst stand-by, 
the Soft-Start is operated every time; so, the 
magnetostriction noises from transformers are 
controlled with the increase of the drain current 
gradually. 
Fig.6. VCC Terminal Vol. Waveform 
at Latch-mode  
Fig.7.  Soft-Start Operation 
Power MOSFET
Wa vefo r m I
SS/OLP
Normal StartUp
S oftS ta rt
OCP
Limit
VSSOLP(SS)VSS/OLP
ISSOLP(SS)
ISSOLP(OLP)
ISSO L P(NO R)
ＶCC
Ｔｉｍｅ
18 .2 V
（TYP）
　9.6 V
（TYP）
回路電流小
回路電流大
 
						

							CP-850FX Service Manual 
 
Europe R&D 
68 5.10.2.2 Overload Protection 
 
The output characteristics of the secondary side at the time 
when the OCP circuit operates, due to the overload of the 
secondary side output, is shown in Fig.8.  Where the output 
voltage falls below the overload mode, the auxiliary winding 
voltage of the primary side also falls proportionally, and the 
Vcc terminal voltage falls below shutdown voltage to stop the 
operation.  In that case, as the circuit current is also 
decreased simultaneously, the Vcc terminal voltage rise 
again by the start-up resistor Rs ‘s charging current, and the 
circuit re-operates intermittently at the operation start-up 
voltage.  However, where the transformer has lots of output 
windings and the coupling is not sufficient, and even if the 
output voltage is reduced in overload mode, the operation may not be intermittent because the 
primary side auxiliary winding voltage does not fall.  Although the intermittent operation is not 
provided, the operation itself can be protected by the OLP circuit. 
In the overload mode (the mode in which the drain current is controlled by OCP operation), the 
secondary side output voltage falls. Thus, the error-amplifier and photo-coupler in secondary side 
need to be cut off.  The STR-W6700 series recognizes the circumstances continuing OCP 
operation without FB signal as overload mode, and the SS/OLP terminal voltage starts rising by 
I
SSOLP(OLP) as shown in Fig.9, and after the SS/OLP terminal voltage continues rising to reach 
V
SSOLP(OLP) TYP 5V, the oscillation is stopped and turns the latch protection operation.   
 
 
Power MOSFET
Waveform Stop
Voltage Start-up
Voltage Secondary
Output Voltage
OLP
detection le vel
V
CC
Secondary
Output Current
Feedback  Current
(Feedback Voltage)
SS/OLP
OverLoadOperation
Stop Normal
StartUp
SS
VS S O L P( O L P)
OCP
Limit
IS S O L P( O L P)
 
                 図 9  過負荷時のﾀｲﾐﾝｸﾞﾁｬｰﾄ 
 
 
Vou t出力電圧
出力電流
Iou t AC
低AC高
図 ８ 電源出力過負荷特性
Fig.9. Timing-Chart at Overload  
Fig.8. SMPS Output Overload Characteristics 
Vout 
Iout 
AC Low 
AC High 
 
						

							CP-850FX Service Manual 
 
Europe R&D 
69 The time until the latch protection operation starts its operation can be calculated from the 
following formula since the I
SSOLP(OLP) is a constant current circuit.  That is,  
 
C (Condenser Capacity)  x ⊿V(Condenser Charging Voltage: approx. 5V) = I
SSOLP (OLP) x t (time) 
…… (2) 
 
While, the ISSOLP(OLP) contains the voltage dependent characteristics on SS/OLP terminal 
voltage, and ISSOLP(OLP) falls when SS/OLP terminal voltage rises.  The actual value does not 
match to the value calculated from the formula (2) completely, so it is recommended to monitor 
the actual load conditions.  Furthermore, the power supply start-up voltage turning OCP 
operation is also needed to confirm. 
 
5.10.2.3  Operation at Power Supply OFF 
The voltage of the condenser mounted externally to SS/OLP terminal is discharged by the 
internal reset circuit of the HIC at power OFF.  The reset circuit does not start its operation at 
normal operation (i.e., while the internal constant voltage circuit operates). 
 
5.10.2.4  Cancellation of OLP Circuit 
The OLP operation is cancelled by inserting a resistor having 47K ohms (or Zener diodes) into 
SS/OLP terminal at start-up or overload maintaining Soft-Start operation effectively.  
 
 
 
 
 
 
      
                
 図 11  OLP 禁止回路  図 10  リセット回路 
PowerOff時
Reset回路
55
SS/O LP
55
SS/O LP
Fig.11.  OLP Cancellation Circuit 
Reset  Circuit  at Power  
Off 
Fig.10.  Reset Circuit