Nintendo 8 Bit Manual
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41 E.4 Indexed Absolute Indexed absolute addressing takes two operands, forming a 16-bit address, least significant byte first, and adds the value of a register to it to give the address where the data can be found. For example, if the operands are bb and cc, the address of the data will be ccbb + X. There are two forms of indexed absolute addressing: • Absolute, X - Add contents of X register to operand. An example of this addressing mode is AND $1234.X. • Absolute, Y - Add contents of Y register to operand. An example of this addressing mode is AND $1234.Y. Figure E-4. Indexed absolute addressing. E.5 Indirect Indirect addressing takes two operands, forming a 16-bit address, which identifies the least significant byte of another address which is where the data can be found. For example if the operands are bb and cc, and ccbb contains xx and ccbb + 1 contains yy, then the real target address is yyxx. On the 6502, only JMP (Jump) uses this addressing mode and an example is JMP ($1234). The diagram shows the general form of indirect addressing. However, with the JMP instruction, instead of yyxx pointing to the data and the program counter being increased by three, the program counter is set to yyxx and execution resumes from that address.
42 Figure E-5. Indirect addressing. E.6 Implied Many instructions do not require access to operands stored in memory. Examples of implied instructions are CLD (Clear Decimal Mode) and NOP (No Operation). E.7 Accumulator Some instructions operate directly on the contents of the accumulator. The only instructions to use this addressing mode are the shift instructions, ASL (Arithmetic Shift Left), LSR (Logical Shift Right), ROL (Rotate Left) and ROR (Rotate Right). E.8 Immediate Instructions which use immediate addressing operate directly on a constant supplied as an operand to the instruction. Immediate instructions are indicated by prefacing the operand with #, for example AND #$12. Figure E-6. Immediate addressing.
43 E.9 Relative Relative addressing is used in branch instructions. This addressing mode causes the value of the program counter to change if a certain condition is met. The condition is dependant on the instruction. The program counter increments by two regardless of the outcome of the condition but if the condition is true the single operand is added to the program counter to give the new value. For this purpose, the operand is interpreted as a signed byte, that is in the range -128 to 127 to allow forward and backward branching. An example of this addressing mode is BCS *+5 where * represents the current value of the program counter. Figure E-7. Relative addressing. E.10 Indexed Indirect Indexed indirect (also known as pre-indexed) addressing takes a single byte as an operand and adds the value of the X register to it (with wraparound) to give the address of the least significant byte of the target address. For example, if the operand is bb, 00bb is xx and 00bb + 1 is yy then the data can be found at yyxx. An example of this addressing mode is AND ($12,X). Figure E-8. Indexed indirect addressing.
44 E.11 Indirect Indexed Indirect indexed (also known as post-indexed) addressing takes a single operand which gives the zero page address of the least significant byte of a 16-bit address which is then added to the Y register to give the target address. For example, if the operand is bb, 00bb is xx and 00bb + 1 is yy, then the data can be found at yyxx. An example of this addressing mode is AND ($12),Y. Figure E-19. Indirect indexed addressing.
45 Appendix F NES Colour Palette There are different interpretations of the NES colour palette. The palette as defined in [47] is shown below. Alternatives are presented in [5] and [48]. Figure F-1. NES colour palette. Palette Entry RGB Value Palette Entry RGB Value 00 75, 75, 75 20 FF, FF, FF 01 27, 1B, 8F 21 3F, BF, FF 02 00, 00, AB 22 5F, 97, FF 03 47, 00, 9F 23 A7, 8B, FD 04 8F, 00, 77 24 F7, 7B, FF 05 AB, 00, 13 25 FF, 77, B7 06 A7, 00, 00 26 FF, 77, 63 07 7F, 0B, 00 27 FF, 9B, 3B 08 43, 2F, 00 28 F3, BF, 3F 09 00, 47, 00 29 83, D3, 13 0A 00, 51, 00 2A 4F, DF, 4B 0B 00, 3F, 17 2B 58, F8, 98 0C 1B, 3F, 5F 2C 00, EB, DB 0D 00, 00, 00 2D 00, 00, 00 0E 00, 00, 00 2E 00, 00, 00 0F 00, 00, 00 2F 00, 00, 00 10 BC, BC, BC 30 FF, FF, FF 11 00, 73, EF 31 AB, E7, FF 12 23, 3B, EF 32 C7, D7, FF 13 83, 00, F3 33 D7, CB, FF 14 BF, 00, BF 34 FF, C7, FF 15 E7, 00, 5B 35 FF, C7, DB 16 DB, 2B, 00 36 FF, BF, B3 17 CB, 4F, 0F 37 FF, DB, AB 18 8B, 73, 00 38 FF, E7, A3 19 00, 97, 00 39 E3, FF, A3 1A 00, AB, 00 3A AB, F3, BF 1B 00, 93, 3B 3B B3, FF, CF 1C 00, 83, 8B 3C 9F, FF, F3 1D 00, 00, 00 3D 00, 00, 00 1E 00, 00, 00 3E 00, 00, 00 1F 00, 00, 00 3F 00, 00, 00
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