Analog Devices Blackfin FPGA EZExtender Manual Rev 21

							Blackfin FPGA EZ-Extender Manual 1-5 FPGA EZ-Extender Interfaces
shipped with the extender and is pre-programmed. If the serial ROM 
needs to be re-programmed with new code, use an Xilinx JTAG cable and 
software and connect the Xilinx JTAG cable to the flash JTAG header 
(
P6).
More information about programming the serial ROM can be found at 
www.xilinx.com. More details about the different ways to program the 
FPGA can be found in “FPGA EZ-Extender Hardware Reference” on 
page 2-1.  
						

							FPGA EZ-Extender Overview
1-6 Blackfin FPGA EZ-Extender Manual 
						

							Blackfin FPGA EZ-Extender Manual 2-1 
2 FPGA EZ-EXTENDER 
HARDWARE REFERENCE
This chapter describes the hardware design of the Field-Programmable 
Gate Array (FPGA) EZ-Extender. 
The following topics are covered.
“System Architecture” on page 2-2
Describes the configuration of the extender board and explains 
how the board components interface with the processor and 
EZ-KIT Lite.
“Programming the FPGA” on page 2-3
Describes the different methods of programming the FPGA.
“Programming the Serial ROM” on page 2-7
Describes the method of programming the serial ROM.
“Power” on page 2-8
Describes the methods to power the extender board.
“Jumpers” on page 2-11
Describes the function of the configuration jumpers.
“Push Buttons and LEDs” on page 2-15
Describes the function of the push buttons and LEDs.
“Connectors” on page 2-17
Describes the function of the extender connectors. 
						

							System Architecture
2-2 Blackfin FPGA EZ-Extender Manual
System Architecture
A block diagram of the Blackfin FPGA EZ-Extender is shown in 
Figure 2-1. 
Figure 2-1. Block Diagram
Xilinx
Spartan 3
XC3S1000-4FG456C 
FPGA
2MB SRAM
(512k x 32-bits)Memory 
Interface
SPI, SPORT(2x), 
PPI(2x), GPIO, 
Timers, TWI Primary Expansion Interface 
(to BlackFin EZ-KIT)
Secondary Expansion Interface 
(to Test points and other EZ-
Extenders)
Power 
Connector
Regulators
3.3V2.5V1.2V
.1 inch headers
25MHz
Oscillator 
Socket
LED, DIP Switch, 
Push ButtonsSPI, SPORT(2x), 
PPI(2x), GPIO, 
Timers, TWI
Serial 
Flash
High Speed 
Connector
JTAG 
Connector
JTAG 
Connector 
						

							Blackfin FPGA EZ-Extender Manual 2-3 FPGA EZ-Extender Hardware Reference
Programming the FPGA
Before using the Blackfin FPGA EZ-Extender, follow the steps in “FPGA 
EZ-Extender Setup” on page 1-1.
Figure 2-2 is a block diagram of the FPGA programming connections. 
Figure 2-2. FPGA Programming Block Diagram 
						

							Programming the FPGA
2-4 Blackfin FPGA EZ-Extender ManualThere are three ways to program the FPGA: 
 Using the FPGA JTAG header, as described in “FPGA Program-
ming via JTAG” on page 2-4
 Using the Xilinx serial ROM, as described in “FPGA Programming 
via Serial ROM” on page 2-5
 Using the Blackfin processor, as described in “FPGA Programming 
via Blackfin Application” on page 2-6 
The done LED (
LED10) lights up once the FPGA is programmed, signify-
ing that the task is complete. To erase the contents of the FPGA at any 
time, de-press the program switch 
SW1.
FPGA Programming via JTAG
To program the FPGA via the JTAG header, create the appropriate pro-
gram file using the Xilinx ISE software provided at 
www.xilinx.com. Once 
the program file is created, use a Xilinx JTAG cable and connect it to 
P15 
of the FPGA EZ-Extender (the 
P15 connections are shown in Table 2-1).
Table 2-1. P15 Connections for PFGA Programming via JTAG
P15 Pin Number Signal Name
13.3V
2
GND
3TCK
4TDO
5TDI
6TMS 
						

							Blackfin FPGA EZ-Extender Manual 2-5 FPGA EZ-Extender Hardware Reference
In addition to removing 
JP1 (serial ROM boot jumper) as shown in 
Table 2-2, set the boot jumper, 
JP4, to JTAG mode. The JP4 settings for 
JTAG boot are shown in Table 2-3. See “Boot Jumper (JP4)” on 
page 2-13 for more information.
FPGA Programming via Serial ROM
To program the FPGA with the contents of the serial ROM, populate the 
JP1 jumper. When populated, JP1 connects the chip enable pin of the 
serial ROM to the done bit of the FPGA. Once the FPGA is programmed, 
the done bit automatically goes 
high, and the enable pin of the serial 
ROM chip becomes a logic 
1. The JP1 settings for serial ROM boot are 
shown in Table 2-4. See “Programming the Serial ROM” on page 2-7 for 
more information.
The done LED (
LED10) remains lit to signify that the FPGA is pro-
grammed. See “Done LED (LED10)” on page 2-17 for more information. Table 2-2. JP1 Settings for FPGA Programming via JTAG
JP1 Pin Name Pins Connected Jumper Setting
Flash done
JP1.1 and JP1.2Unpopulated
Table 2-3. JP4 Settings for FPGA Programming via JTAG
JP4 Pin Name Pins Connected Jumper Setting
M0 JP4.1 and JP4.2Unpopulated
M1 JP4.3 and JP4.4Populated
M2 JP4.5 and JP4.6Unpopulated
Table 2-4. JP1 Settings for FPGA Programming via Serial ROM
JP1 Pin Name Pins Connected Jumper Setting
Flash done
JP1.1 and JP1.2Populated 
						

							Programming the FPGA
2-6 Blackfin FPGA EZ-Extender ManualIn addition to 
JP1, set the boot mode jumper, JP4, to master serial mode. 
The 
JP4 settings for serial ROM boot are shown in Table 2-5. See “Boot 
Jumper (JP4)” on page 2-13 for more information.
FPGA Programming via Blackfin Application
By default, the FPGA EZ-Extender is configured by the flash program-
ming utility within CCES or VisualDSP++. The software is located in the 
Examples folder of the installation directory. The FPGA Extender readme 
text file located in the same folder provides all the necessary instructions 
required for running the application.
When generating a program file using the Xilinx software tools, 
remember to generate a slave serial program file in the Intel 
MCS-86 Hexadecimal Object (
.mcs) file format.
To boot the FPGA from the Blackfin processor, unpopulate jumper 
JP1 
and set jumper 
JP4 to slave serial mode, as shown in Table 2-6 and 
Table 2-7. See “Serial ROM Boot Jumper (JP1)” on page 2-12 and “Boot 
Jumper (JP4)” on page 2-13 for more information. Table 2-5. JP4 Settings for FPGA Programming in Master Serial Mode
JP4 Pin Name Pins Connected Jumper Setting
M0 JP4.1 and JP4.2Populated
M1 JP4.3 and JP4.4Populated
M2 JP4.5 and JP4.6Populated
Table 2-6. JP1 Settings for FPGA Programming via Blackfin Processor
JP1 Pin Name Pins Connected Jumper Setting
Flash done
JP1.1 and JP1.2Unpopulated 
						

							Blackfin FPGA EZ-Extender Manual 2-7 FPGA EZ-Extender Hardware Reference
Programming the Serial ROM
The FPGA EZ-Extender allows the user to program the serial ROM. The 
serial ROM can be programmed by using a Xilinx JTAG cable, ISE soft-
ware, and the flash JTAG header on the FPGA EZ-Extender.
Serial ROM via JTAG Header
To program the serial ROM via the JTAG header, create the appropriate 
program file using the Xilinx software provided at 
www.xilinx.com. Once 
the program file is created, use a Xilinx JTAG cable and connect it to 
P6. 
The 
P6 connections are shown in Table 2-8. Table 2-7. JP4 Settings for FPGA Programming via Blackfin Processor
JP4 Pin Name Pins Connected Jumper Setting
M0 JP4.1 and JP4.2Unpopulated
M1 JP4.3 and JP4.4Unpopulated
M2 JP4.5 and JP4.6Unpopulated
Table 2-8. P6 Connections for Serial ROM
P6 Pin Number Signal Name P6 Pin Number Signal Name
13.3V4
TDO
2GND5TDI
3TCK6TMS 
						

							Power
2-8 Blackfin FPGA EZ-Extender Manual
Power
The FPGA EZ-Extender can be powered from the enclosed power supply, 
EZ-KIT Lite, or external power supply. The power source for the extender 
is selected based on the power requirements of the application.
An external 7V power supply is shipped with the extender board. The 
power supply uses three switching regulators: 
VR1 is used to power the 
2.5V power plane, 
VR2 is used to power the 1.2V power plane, and VR3 is 
used to power the 3.3V plane. All of the regulators can supply a maximum 
current of 2 Amps. To understand the power requirements of your appli-
cation, run the Xilinx power estimator software. The software can be 
located at 
www.xilinx.com.
Table 2-9 states the current limitations of each method. Each method 
requires a correctly configured header, described in the following sections.
Table 2-9. Power Limitations
Power Source 1.2V Supply 2.5V Supply 3.3V Supply
ADSP-BF533, ADSP-BF537, or 
ADSP-BF561 EZ-KIT Lite500 mA 500 mA 500 mA
FPGA EZ-Extender power supply
1
1   Default setting2A 2A 2A
External power supply 2A 2A 2A