Analog Devices Blackfin FPGA EZExtender Manual Rev 21
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Blackfin FPGA EZ-Extender Manual 2-9 FPGA EZ-Extender Hardware Reference Power In Header (P12) The P12 header supplies the power to the on board 1.2V and the 2.5V reg- ulators. The P42 and P43 headers supply the power to the external 1.2V and 2.5V planes, as described in “2.5V Header (P42)” and “1.2V Header (P43)” on page 2-10. 3.3V Header (P13) When using an external power supply, do not plug in the power supply shipped with the FPGA EZ-Extender. This can seriously damage the board. As an extra measure of precaution, remove all jumpers from P12. Power Source P12 Setting FPGA EZ-Extender power supply 1 1 Default settingJumper on P12.1 and P12.2 ADSP-BF533, ADSP-BF537, or ADSP-BF561 EZ-KIT Lite 5V power supply Jumper on P12.2 and P12.3 Power Source P13 Setting ADSP-BF533, ADSP-BF537, or ADSP-BF561 EZ-KIT Lite 3.3V power supplyJumper on P13.1 and P13.2 FPGA EZ-Extender power supply1 1 Default settingJumper on P13.2 and P13.3 External power supply No jumper; connect supply to P13.2 and GND
Power 2-10 Blackfin FPGA EZ-Extender Manual 2.5V Header (P42) When using an external power supply, do not plug in the power supply shipped with the FPGA EZ-Extender. This can seriously damage the board. As an extra measure of precaution, remove all jumpers from P12. 1.2V Header (P43) When using an external power supply, do not plug in the power supply shipped with the FPGA EZ-Extender. This can seriously damage the board. As an extra measure of precaution, remove all jumpers from P12. Power Source P42 Setting FPGA EZ-Extender Power Supply 1 1 Default settingNo Jumper External power supply Connect P42.1 to external 2.5V Connect P42.2 to external GND Power Source P43 Setting FPGA EZ-Extender power supply 1 1 Default settingNo Jumper External power supply Connect P42.1 to external 2.5V Connect P42.2 to external GND
Blackfin FPGA EZ-Extender Manual 2-11 FPGA EZ-Extender Hardware Reference Jumpers Before using the Blackfin FPGA EZ-Extender, follow the steps in “FPGA EZ-Extender Setup” on page 1-1. Figure 2-3 shows the locations of all jumper headers. A two-pin jumper can be placed on the respective jumper header for different functionality. The following sections describe all possible jumper settings and associated functionality. Figure 2-3. Jumper Locations
Jumpers 2-12 Blackfin FPGA EZ-Extender Manual Serial ROM Boot Jumper (JP1) By default, the serial ROM boot jumper, JP1, is unpopulated. When unpopulated, the FPGA EZ-Extender programs via the Blackfin processor or the Xilinx JTAG header. When JP1 is left populated, the jumper connects the serial ROM chip enable pin to the done bit of the FPGA. At power-up, the done bit is driven low by the FPGA, causing the FPGA to enable the serial ROM as a programming source. After the FPGA is programmed, the done bit is driven high by the FPGA, causing the FPGA to drive high the chip enable pin of the serial ROM. Both JP1 and JP4 must be set up for correct FPGA programming. “Boot Jumper (JP4)” on page 2-13 summarizes the JP4 settings. Table 2-10 sum- marizes the JP1 settings. See Table 2-4 on page 2-5 and Table 2-6 on page 2-6 for more information on JP1. Config Done Jumper (JP2) The configuration done jumper, JP2, connects the done bit of the FPGA to the Blackfin processor’s PF3 flag pin of the ADSP-BF533 and ADSP-BF561 EZ-KIT Lites or PF14 flag pin of the ADSP-BF537 EZ-KIT Lite. By default, the jumper is populated and acts as a monitor for the done bit by the Blackfin processor (the bit indicates that the FPGA pro- gramming is complete). Table 2-10. JP1 Settings Boot Source JP1 Setting ADSP-BF533, ADSP-BF537, or ADSP-BF561 processor via CCES or VisualDSP++ 1 1 Default settingUnpopulated JTAG header Unpopulated Serial ROM Populated
Blackfin FPGA EZ-Extender Manual 2-13 FPGA EZ-Extender Hardware Reference Table 2-11 summarizes the jumper settings. Config Program Jumper (JP3) The configuration program jumper, JP3, connects the program bit of the FPGA to the Blackfin processor’s flag pin. By default, JP3 is populated. The jumper assures that the program bit is asserted by the Blackfin proces- sor to initiate the FPGA programming through development software. Table 2-12 summarizes the jumper settings. Boot Jumper (JP4) The boot jumper, JP4, configures the FPGA mode pins (M[2:0]). Based on the jumper settings, the FPGA is set to be programmed by the JTAG header, serial ROM, or Blackfin processor. Table 2-11. JP2 Settings Functionality JP2 Setting Done bit connected to Blackfin processor’s PF3 flag pin 1 1 Default settingPo p u l a t e d Done bit disconnected from Blackfin processor’s PF3 flag pinUnpopulated Table 2-12. JP3 Settings Functionality JP3 Setting Program bit connected to the Blackfin processor’s flag pin 1 1 Default settingPo p u l a t e d Program bit disconnected from the Blackfin proces- sor’s flag pinUnpopulated
Jumpers 2-14 Blackfin FPGA EZ-Extender ManualTable 2-13 summarizes the jumper settings. See Table 2-3 on page 2-5 for the JTAG header boot settings, Table 2-5 on page 2-6 for the serial ROM boot settings, and Table 2-7 on page 2-7 for the Blackfin processor boot settings. FPGA Input Jumpers (JP5) The FPGA input jumpers, JP5.2–5.8, drive select FPGA nets to a logic 0 and can be used for any user logic that requires a steady state input. You can set internal pull-ups on these nets in the FPGA and, when a low is required, populate the respective jumper. Table 2-14 summarizes the jumper settings. Table 2-13. JP4 Settings Boot Source JP4.1 and JP4.2 M0JP4.3 and JP4.4 M1JP4.5 and JP4.6 M2 ADSP-BF533, ADSP-BF537, or ADSP-BF561 processor 1 1 Default settingUnpopulated Unpopulated Unpopulated JTAG header Unpopulated Populated Unpopulated Serial ROM Populated Populated Populated Table 2-14. JP5 Settings Reference Designator FPGA Pin Number JP5.2 Y3 JP5.4 Y2 JP5.6 U10 JP5.8 AB11
Blackfin FPGA EZ-Extender Manual 2-15 FPGA EZ-Extender Hardware Reference Push Buttons and LEDs Before using the Blackfin FPGA EZ-Extender, follow the steps in “FPGA EZ-Extender Setup” on page 1-1. Figure 2-4 shows the locations of all push buttons and LEDs. The follow- ing sections describe the associated functionality of all the push buttons and LEDs. Figure 2-4. Push Button and LED Locations
Push Buttons and LEDs 2-16 Blackfin FPGA EZ-Extender Manual Program Push Button (SW1) The program push button, SW1, erases the contents of the FPGA. The push button can be used as a hard reset—the FPGA must be completely re-programmed once SW1 is de-pressed. See “Programming the FPGA” on page 2-3 for more information. PB1 Push Button (SW3) The PB1 push button, SW3, is a general-purpose input push button. The switch with a connected debounce circuit eliminates the need to re-create it in the FPGA. The push button connects to pin C11 of the FPGA. PB2 Push Button (SW4) The PB2 push button, SW4, is a general-purpose input push button. The switch does not have a connected debounce circuit; you may need to cre- ate it in the FPGA if required by a specific application. The push button connects to pin H5 of the FPGA. Status LEDs (LED1–8) Eight status LEDs, LED1–8, connect to the FPGA and act as status flags in any application that requires it. Table 2-15 shows the LED/FPGA connections. Table 2-15. Status LED (LED1–8) Settings Reference Designator FPGA Pin Number LED1 U11 LED2 W11 LED3 AB10 LED4 Y10
Blackfin FPGA EZ-Extender Manual 2-17 FPGA EZ-Extender Hardware Reference Power LED (LED9) The power LED, LED9, connects to the 2.5V power supply and, when lit, signifies that the FPGA EZ-Extender is powered properly. Done LED (LED10) The done LED, LED10, connects to the done pin of the FPGA. At power-up, the FPGA is blank and needs to be programmed. When lit, the LED indicates that the FPGA is programmed successfully. Connectors Before using the Blackfin FPGA EZ-Extender, follow the steps in “FPGA EZ-Extender Setup” on page 1-1. This section describes the connector functionality and provides informa- tion about the mating connectors. The connector locations are shown in Figure 2-5. LED5 AB9 LED6 W9 LED7 AB8 LED8 V10 Table 2-15. Status LED (LED1–8) Settings (Cont’d) Reference Designator FPGA Pin Number
Connectors 2-18 Blackfin FPGA EZ-Extender Manual Expansion Interface (P1–3 and J1–3) Connectors P1–3 of the expansion interface are used to plug in the EZ-Extender to the ADSP-BF533, ADSP-BF537, or ADSP-BF561 EZ-KIT Lite. Figure 2-5. Connector Locations