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Hughes Jvc 220 Projector Service Manual

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Page 51

Chapter 2---System Description 
CORR_ 
SYNC 
Square wave HCT level synchronous signal for horiz axis. 
HORIZONTAL/VERTICAL DEFLECTION BOARD 
OUTPUTS DESCRIPTION 
IIC_CLK IIC clock line. Unidirectional clock line for control of synchronous 
data transfer over the IIC bus interface. 
IIC_DATA IIC data line. Bidirectional serial line for synchronous data transfer 
between the SCB and the Horizontal/Vertical Deflection board. 
I=Input, O=Output. 
O    V_RED_LIN_CONTROL 
O    V_GRN_LIN_CONTROL 
O...

Page 52

  Chapter 2---System Description 
LV_ENA Signal to enable the LVPS 
ARC LAMP POWER SUPPLY 
INPUTS DESCRIPTION 
/LAMP_OK Informs SCB that the Arc Lamp is installed, temperature is within 
limits, and lamp cooling blower is working 
/LAMP_LIT Informs the SCB that the Arc Lamp is lit or not lit 
OUTPUTS DESCRIPTION 
 /LAMP_ENA Enables ALPS power 
PROJECTION LENS 
OUTPUTS DESCRIPTION 
LENS_FOCUS Signal to lens focus motor 
LENS_ZOOM Signal to lens zoom motor 
FRONT IR 
INPUTS DESCRIPTION 
/FRONT_IR Input...

Page 53

Chapter 2---System Description 
• IIC interface 
• Video clamp pulse generation 
• Source change detection 
• HVPS sync generation 
• Horizontal deflection enable circuitry 
The RTG I/O Diagram (Figure 2-13) and the list of inputs and 
outputs (Tables 2-12 and 2-13) provide information for the 
technician to perform module level troubleshooting. 
Horizontal frequency band selection and LED logic. 
The RTG produces a voltage that is proportional to the horizontal 
frequency which is used by the Horiz/Vert...

Page 54

  Chapter 2---System Description 
B3     V_SYNC
B4    H_SYNC
B5    G_SYNC
HVPS_SYNC    A14
 A5    GRN_INPUT
A32        +5.1V
A31         +15V
    B30        -15V
V_DRIVE        B15 
B19     ISYNC_CLK
B27     IIC_CLKBLANKING      B1
CLAMP            B2
ODD_FIELD        B23
SOURCE_VALID    B24
280_CLK        B21
B28     IIC_DATA
J13
J13
FROM
SCB
FROM 
VPB
FROM
LVPS
TO
SCB
TO
VPB
RASTER
TIMING
GENERATOR
H_BAND1           B8
H_BAND0           B7
H_BAND2           B9
H_F2V                 B12
/H_ENABLE...

Page 55

Chapter 2---System Description 
I 12 Bottom blanking Data for adjustment of bottom blanking 
I 8 Horz. phase Data for adjustment of horizontal phase 
I 12 Vert. phase Data for adjustment of vertical phase 
O 3 Frequency bands The frequency band associated with the current 
signal 
O 1 /RTG_OK A low on this line indicates an operational RTG 
board 
O 2 RTG_MODEL The revision of the RTG board 
O 12 H_COUNT The number of horizontal lines associated with 
the current signal 
O 12 V_COUNT Data for V_COUNT 
O...

Page 56

  Chapter 2---System Description 
V_SYNC Input vertical sync  
H_SYNC Input horizontal or composite sync 
G_SYNC Sync on green signal which is stripped for the green video 
GRN_INPUT Buffered version of green video 
OUTPUTS DESCRIPTION 
Clamp A negative going video clamp signal with about 3 % duty cycle 
Blanking  Blanking signal composed of right, left, top and bottom blanking 
HORIZONTAL/VERTICAL DEFLECTION BOARD 
INPUTS DESCRIPTION 
/H_ 
FLYBACK 
Not used by the RTG board 
OUTPUTS DESCRIPTION 
H_BAND0...

Page 57

Chapter 2---System Description 
+5.1V_STBY Stand by + 5.1 V. Not used by RTG board. 
 
Interlock and protection: 
Input 
None 
Output 
The RTG will disable the Horizontal Deflection Board by placing a 
high on the /H_ENABLE line during any of following events: 
A.   During and about 2 seconds after the programming period of 
the FPGA. 
B.   During frequency band change period. 
C.   During the period that the phase locked loop is out of lock. 
2.3.8   Horizontal/Vertical Deflection PCB 
The HVD board is...

Page 58

  Chapter 2---System Description 
interface consists of a clock line, a data line, and an interrupt line. \
The HVD board does not create any interrupt and the interrupt line 
is not used for this application. Table 2-14 lists the adjustments 
executed via the IIC bus interface (I = Input to HVD board , O = 
Output from HVD board): 
 
 
Figure 2-14.  Horizontal/Vertical Deflection PCB I/O Diagram. 
2-44 Model 220 Service Manual  

Page 59

Chapter 2---System Description 
Table 2-14.  Horizontal/Vertical Deflection IIC Data Interface 
INPUT / 
OUTPUT 
NO. 
OF 
BITS INFORMATION DESCRIPTION 
I 8 V_RED_LIN_CONTROL Data for adjustment of red vertical 
linearity   
I 8 V_GRN_LIN_CONTROL Data for adjustment of green vertical 
linearity  
I 8 V_BLU_LIN_CONTROL Data for adjustment of blue vertical 
linearity  
    
I 8 V_RED_EDGE_CONTROL Data for adjustment of red vertical 
edge linearity 
I 8 V_GRN_EDGE_CONTROL Data for adjustment of green...

Page 60

  Chapter 2---System Description 
is used as the primary heading of each group of signals. Those 
signals are subdivided into inputs and outputs. Input refers to an 
Input to the HVD Board, output refers to an output from the HVD 
Board. 
Table 2-15.  Horizontal/Vertical Deflection I/O signals 
SYSTEM CONTROLLER BOARD
INPUTS DESCRIPTION 
IIC_CLK IIC clock line. Unidirectional clock line for control of synchronous 
data transfer over the IIC bus interface. 
IIC_DATA IIC data line. Bidirectional serial...
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