JBL Ms 8 Service Manual

PDF: 09005aef811ce1fe/Source: 09005aef811ce1d5Micron Technology, Inc., reserves the right to change products or specifications without notice.
64MSDRAMx32_2.fm - Rev. J 12/08 EN8©2001 Micron Technology, Inc. All rights reserved.
 64Mb: x32 SDRAM
Pin/Ball Assignments and Descriptions
Figure 3:   90-Ball VFBGA (Top View, Ball Down)
1234 6789 5
DQ26
DQ28
V
SSQ
V
SSQ
V
DDQ
V
SS
A4
A7
CLK
DQM1 V
DDQ
V
SSQ
V
SSQ
DQ11
DQ13 DQ24
V
DDQ
DQ27
DQ29
DQ31
DQM3 A5
A8
CKE NC
DQ8
DQ10
DQ12 V
DDQ
DQ15 V
SS
VSSQ
DQ25
DQ30...

PDF: 09005aef811ce1fe/Source: 09005aef811ce1d5Micron Technology, Inc., reserves the right to change products or specifications without notice.
64MSDRAMx32_2.fm - Rev. J 12/08 EN9©2001 Micron Technology, Inc. All rights reserved.
 64Mb: x32 SDRAM
Pin/Ball Assignments and Descriptions
 
Table 4:  Pin/Ba ll Descriptions
86-Pin TSOP 
Numbers90-Ball VFBGA  NumbersSymbolTy p eDescription
68 J1 CLK Input Clock: CLK is driven by the system  clock. All SDRAM input signals 
are sampled on the positive edge  of...

PDF: 09005aef811ce1fe/Source: 09005aef811ce1d5Micron Technology, Inc., reserves the right to change products or specifications without notice.
64MSDRAMx32_2.fm - Rev. J 12/08 EN10©2001 Micron Technology, Inc. All rights reserved.
 64Mb: x32 SDRAM
Functional Description
Functional Description
In general, this 64Mb SDRAM (512K x 32 x 4 banks) is a 4-bank DRAM that operates at 
3.3V and includes a synchronous interface (all signals are registered on the positive edge 
of the clock signal, CLK). Each of the...

PDF: 09005aef811ce1fe/Source: 09005aef811ce1d5Micron Technology, Inc., reserves the right to change products or specifications without notice.
64MSDRAMx32_2.fm - Rev. J 12/08 EN11©2001 Micron Technology, Inc. All rights reserved.
 64Mb: x32 SDRAM
Functional Description
When in the idle state, at least two AUTO REFRESH cycles must be performed. After the 
AUTO REFRESH cycles are complete, the SDRAM is ready for mode register program-
ming. Because the mode register will power up  in an unknown state, it...

AUREUS TMS320DA610, TMS320DA601
FLOATING-POINT DIGITAL SIGNAL PROCESSORS
POST OFFICE BOX 1443 • HOUSTON, TEXAS 772511443

Aureus  High-Performance 32-/64-Bit
Audio Digital Signal Processors (DSPs)

DA610-250 MHz, 2000 MIPS/1500 MFLOPS

DA601-225 MHz, 1800 MIPS/1350 MFLOPS

Single DSP Solutions for Multichannel
Audio Applications: A/V and DVD
Receivers, Multi-Zone Receivers, High
Speed Encoder, Simultaneous
Encode/Decode, Surround Headphone,
Speaker Virtualization, Room Correction

DA601 and DA610...

AUREUS TMS320DA610, TMS320DA601
FLOATING-POINT DIGITAL SIGNAL PROCESSORS
SPRS002I   SEPTEMBER 2001  REVISED OCTOBER 2005
3POST OFFICE BOX 1443 • HOUSTON, TEXAS 772511443
GDP BGA package (bottom view) 
VSSVSS
CLKIN CVDD
VSSVSS
VSSCVDDDVDDCE2EA4 DVDDED17 EA6DVDDEA13VSSEA15EA19 CE1CVDDVSS
GP0[5]
(EXT_INT5)/ AMUTEIN0 GP0[4]
(EXT_INT4)/ AMUTEIN1
CVDDED16 BE3CE3EA3 EA5 EA8 EA10
EMU4 OSCOUT NMIEA12 DVDD
HD9/
GP0[9] HD6/
AHCLKR1CVDDHD4/
GP0[0] HD3/
AMUTE1
ED20 ED19
CV
DDCLK
MODE0 PLLHV ARE
/
SDCAS/
SSADSDVDD...

AUREUS TMS320DA610, TMS320DA601
FLOATING-POINT DIGITAL SIGNAL PROCESSORS
SPRS002I   SEPTEMBER 2001  REVISED OCTOBER 2005
4POST OFFICE BOX 1443 • HOUSTON, TEXAS 772511443
PYP PowerPAD QFP package (top view) 
HD5/AHCLKX1
HD8/GP0[8]
HD6/AHCLKR1
HD7/GP0[3]
HD9/GP0[9]
HD10/GP0[10]
HD11/GP0[11]
HD12/GP0[12]
HD13/GP0[13]
HD14/GP0[14]
HD15/GP0[15] NMI
OSCIN
OSCOUT
EMU1
EMU0TDO
TDI
TMS TCK
RSV2
RSV0
RSV1
CLKIN
CLKMODE0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33...

AUREUS TMS320DA610, TMS320DA601
FLOATING-POINT DIGITAL SIGNAL PROCESSORS
SPRS002I   SEPTEMBER 2001  REVISED OCTOBER 2005
8POST OFFICE BOX 1443 • HOUSTON, TEXAS 772511443
functional block and CPU (DSP core) diagram 
Test
C67x
 CPU
Data Path B
B Register File
Instruction Fetch
Instruction Dispatch
Instruction Decode
Data Path A
A Register File
Power-DownLogic
.L1
†.S1†.M1†.D1 .D2 .M2†.S2†.L2†
L1P Cache
Direct Mapped
4K Bytes Total
Control
Registers
Control Logic
L1D Cache 2-Way Set
Associative
4K Bytes...

Full Speed USB Flash MCU Family
C8051F340/1/2/3/4/5/6/7/8/9/A/B
Analog Peripherals
-10-Bit ADC (C8051F340/1/2/3/4/5/6/7 only)•Up to 200 ksps•Built-in analog multiplexer with single-ended and differential mode•VREF from external pin, internal reference, or VDD•Built-in temperature sensor•External conversion start input option-Two comparators
-Internal voltage reference (C8051F340/1/2/3/4/5/6/7 
only)
-Brown-out detector and POR CircuitryUSB Function Controller
-USB specification 2.0 compliant
-Full...

Rev. 1.317
C8051F340/1/2/3/4/5/6/7/8/9/A/B
1. System Overview
C8051F340/1/2/3/4/5/6/7/8/9/A/B devices are fully  integrated mixed-signal S ystem-on-a-Chip MCUs. High-
lighted features are listed below. Refer to Ta b l e 1.1 for specific product feature selection.
• High-speed pipelined 8051-compatible microcontroller core (up to 48 MIPS)
• In-system, full-speed, non-intrusive debug interface (on-chip)
• Universal Serial Bus (USB) Function Controller wit h eight flexible endpoint pipes, integrated...