Motorola Radio Mcs2000 Vol 1 68p81083c20 A Manual
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Controller Section Theory of Operation 7-19 capacitor between ASFIC pre-emphasis out U0200-C8 and ASFIC limiter in U0200-E8 AC couples the signal between ASFIC blocks and prevents the DC bias at the ASFIC output U0200-H8 from shifting when the ASFIC transmit circuits are powered up. The signal is then limited to prevent the transmitter from over deviating. The limited mic audio is then routed through a summer, used to add in signalling data, and then to a splatter Þlter to eliminate high frequency spectral components that could be generated by the limiter. The audio is then routed to two attenuators, which are tuned in the factory or the Þeld to set the proper amount of FM deviation. The TX audio emerges from the ASFIC at U0200-H8 AUDIO MOD, at which point it is routed to the RF section. Auxiliary TX Audio PathsThere are three auxiliary transmit audio inputs that are routed to the auxiliary transmit path in the ASFIC. These are AUX TX IN1, AUX TX IN2, and AUX TX IN3. The 3 paths, only one of which can be active at a time, are buffered by U0202. AUX TX IN2 is special in that it can ÒchangeÓ input impedance. The Òvoltage modeÓ signal to U0400 is 9.3 V if the source for the auxiliary transmit audio from J0403 is a current source. The Òvoltage modeÓ signal is 0 V if the auxiliary transmit source is a voltage source. The difference being R0219 is bypassed by the transmission gate or not. Typically current source mode will apply for SB9600 based devices. C0217 sets the lower frequency (high pass) signal of approximately 1 Hz. The processing of the signal on the auxiliary transmit path depends on how the ASFIC is conÞgured. It can bypass Þlters, pre-emphasis, limiter, and/or splatter Þlter. TX Secure Audio (AUX TX IN1 and AUX TX IN3)The audio follows the normal transmit audio processing until it emerges from the ASFIC pre-emphasis out pin (U0200-C8), which is fed to the secure board residing at either option connector J0401-7 / J0403-7. The Secure board contains circuitry to amplify, digitize, encrypt, and Þlter the audio. The encrypted signal is then fed back from J0401-14 / J0408-14 to the AUX TX buffer through R0217 or R0218, and then to the ASFIC AUX TX input (U0200- D7). The signal level at this pin should be about 1 Vpp. The signal is then routed through the AUX TX path in the ASFIC (which bypasses everything before including the ASFIC splatter Þlter) and summed into the main modulation path. After the summer, it runs through the modulation attenuator and then to the AUDIO MOD port U0200-H8. Transmit Signalling Circuits(Refer to Figure 7-3 for reference for the following sections) There are four types of transmit data: 1. Sub-audible data (PL/DPL/Connect Tone) that gets summed with transmit voice or signalling, 2. High speed (3600 baud) data for trunking control channel communication 3. DTMF data for telephone communication in trunked and conventional systems, and 4. MDC data for use in Motorola proprietary MDC systems. Select 5 and MPT-1327 signalling can be supported by the MDC signaling hardware.
7-20 Controller Section Theory of Operation Sub-audible Data (PL/DPL)Sub-audible data implies signalling whose bandwidth is below 300 Hz. PL and DPL waveforms are used for conventional operation and connect tones for trunked voice channel operation. The trunking connect tone is simply a PL tone at a higher deviation level than PL in a conventional system. Although it is referred to as Òsub-audible data,Ó the actual frequency spectrum of these waveforms may be as high as 250 Hz, which is audible to the human ear. However, the radio receiver Þlters out any audio below 300 Hz, so these tones are never heard in the actual system. Only one type of sub-audible data can be generated by U0200 at any one time. The process is as follows, using the SPI BUS, the mP programs the ASFIC (U0200) to set up the proper low-speed data deviation and select the PL or DPL Þlters. The mP then generates a square wave which strobes the ASFIC PL/DPL encode input PL CLK U0200-C3 at twelve times the desired data rate. For example, for a PL frequency of 103 Hz, the frequency of the square wave would be 1236 Hz. This drives a tone generator inside U0200 which generates a staircase approximation to a PL sine wave or DPL data pattern. This internal waveform is then lowpass Þltered and summed with voice or data. The resulting summed waveform then appears on U0200-H8 (AUDIO MOD), where it is sent to the RF board as previously described for transmit audio. A trunking connect tone would be generated in the same manner as a PL tone. High Speed DataHigh speed data refers to the 3600 baud data waveforms, known as Inbound Signalling Words (ISWs) used in a trunking system for high speed communication between the central controller and the radio. To generate an ISW, the uP Þrst programs the ASFIC (U0200) to the proper Þlter and gain settings. It then begins strobing U0200-G1 (TX DATA) with a pulse Figure 7-3 Transmit Signalling Paths when the data is supposed to change states. U0200Õs 5-3-2 State Encoder (which is in a 2-state mode) is then fed to the post-limiter summer block and then the splatter Þlter. From that point it is routed through the modulation attenuators and then out of the ASFIC to the RF board. MPT 1327 and MDC are generated in much the same way as Trunking ISW. However, in some cases MICRO CONTROLLERG1 C3 G2HIGH SPEED CLOCK IN LOW SPEED CLOCK DTMF CLOCK ASFIC U0200 H8 AUDIO MODTO RF SECTION (VCO) DTMF ENCODER 5-3-2 STATE ENCODER HS SUMMER SPLATTER FILTER LS SUMMER ATTENUATOR PL ENCODER
Controller Section Theory of Operation 7-21 these signals may also pass through a data pre-emphasis block in the ASFIC. Also these signalling schemes are based on sending a combination of 1200 Hz and 1800 Hz tones only. Microphone audio is muted during High Speed Data signalling. Dual Tone Multiple Frequency (DTMF) DataDTMF data is a dual tone waveform used during phone interconnect operation. It is the same type of tones which are heard when using a ÒTouch ToneÓ telephone. There are seven frequencies, with four in the low group (697, 770, 852, 941 Hz) and three in the high group (1209, 1336, 1477 Hz). The high-group tone is generated by the mP (U0103-74 /U0003-B4) strobing U0200-G1 at six times the tone frequency for tones less than 1440 Hz or twice the frequency for tones greater than 1440 Hz. The low group tone is generated by the mP (U0103-73/U0003-C4) strobing U0200-G2 (DTMF CLOCK) at six times the tone frequency. Inside U0200 the low-group and high-group tones are summed (with the amplitude of the high group tone being approximately 2 dB greater than that of the low group tone) and then pre-emphasized before being routed to the summer and splatter Þlter. The DTMF waveform then follows the same path as was described for high-speed data. MDC DataThe MDC signal follows exactly the same path as the DTMF high group tone. MDC data utilizes MSK modulation, in which a logic zero is represented by one cycle of a 1200 Hz, and a logic one by 1.5 cycles of an 1800 Hz. To generate the data, the microcontroller Þrst programs the ASFIC (U0200) with TXSG1 and TXSG0 control lines to the proper Þlter and gain settings. It then begins strobing U0200/Trunking Clock In with a pulse every time there should be a transition in the MDC waveform. The output waveform from U0200s 5-3-2 State Encoder is then fed to the post-limiter summer block and then the splatter Þlter. From that point it is routed through the modulation attenuators and then out of the ASFIC to the RF board. Microphone audio is muted during MDC signalling. Receive Audio Circuits(Refer to Figure 7-4 for reference for the following sections) Squelch DetectThe radioÕs RF circuits are constantly producing an output at the discriminator. In addition to the raw discriminator signal DISC (IF1-3-2-1), the RF boardÕs Zero IF IC also provides a separate buffered version of the discriminator signal that is dedicated to the ASFICÕs squelch detect circuitry SQUELCH (IF1-2-17- 1). This signal enters the controller board and is routed to the ASFIC on U0200-H7. All of the squelch detect circuitry is contained within the ASFIC. Therefore from a userÕs point of view, SQUELCH enters the ASFIC, and the ASFIC produces to CMOS logic outputs based on the result. They are CH ACT (U0200-H1) and SQ DET (U0200-H1). The squelch signal entering the ASFIC is ampliÞed, Þltered, attenuated, and rectiÞed. It is then sent to a comparator to produce an active high signal on CH ACT. A squelch tail circuit is used to produce SQ DET (U0200-H1) from CH ACT. The state of CH ACT and SQ DET is high (logic 1) when carrier is detected, otherwise low (logic 0). Both CH ACT and SQ DET are routed to the SLIC (U0104-F4/H1).
7-22 Controller Section Theory of OperationSQ DET is used to determine all audio mute/unmute decisions except for Conventional Scan. In this case CH ACT is a pre-indicator as it occurs slightly faster than SQ DET. Audio Processing and Digital Volume ControlThe signal enters the controller section from the ZIF on DISC (IF1-3-2-1) and passes through RC Þlter R0245 and C0236 which Þlters out ZIF sampling noise. The signal is AC coupled by C0202 and enters the ASFIC via the PL IN pin U0200-J7. Inside the IC, the signal goes through 2 paths in parallel. Figure 7-4 Receive Audio Paths The audio path has a programmable ampliÞer, whose setting is based on the channel bandwidth being received, then a LPF Þlter to remove any frequency components above 3000 Hz and then an HPF to strip off any sub-audible data below 300 Hz. Next, the recovered audio passes through a de-emphasis Þlter if it is enabled (to compensate for Pre-emphasis which is used to reduce the effects of FM noise). The IC then passes the audio through the 8-bit J403 12 11 25 3 1 2FILTERED AUDIO UNIV IO OUT EXTERNAL SPEAKER INTERNAL SPEAKER ACCESSORY CONNECTOR CONTROL HEAD CONNECTOR AUX RX HANDSET AUDIO 8 2 1 J405 INT SPKR+ SPKR - SPKR +AUDIO PA U02034 61 9 ATTEN. UNIV IORX AUD OUT UNAT RX OUT EXP AUD IN RX IN PL IN AUX RX IN SQ INCH ACTSQ DET ASFIC U0200 VOLUME ATTEN. MICRO CONTROLLER HEARCLEAR - I IC U0250 EXP IN EXP OUT FF OUT FFIN A2 F4J5 H6 J7 J6 C1 J401 J4089 10 5 9 10 5 DISCDISC (GAIN CONTROLLED)AUX RX DISCDISC (GAIN CONTROLLED) AUX RX E4 DISC (DISCRIMINATOR AUDIO) SQUELCH FROM RF SECTION (ZIF) H7 H2 H1 J4 B2 H5 SQUELCH CIRCUIT FILTER AND DEEMPHASIS LIMITER, RECTIFIER FILTER, COMPARATOR INTERNAL OPTION CONNECTORS
Controller Section Theory of Operation 7-23 programmable attenuator whose level is set depending on the value of the volume control. Finally the Þltered audio signal passes through an output buffer within the ASFIC. The audio signal exits the ASFIC at RX AUDIO (U0200-J4). The mP programs the attenuator, using the SPI BUS, based on SB9600 messages from the control head. The minimum /maximum settings of the attenuator are set by codeplug parameters. Since sub-audible signalling is summed with voice information on transmit, it must be separated from the voice information before processing. Any sub- audible signalling enters the ASFIC from the ZIF at PL IN U0200-J7. Once inside it goes through the PL/DPL path. The signal Þrst passes through one of 2 low pass Þlters, either PL low pass Þlter or DPL/LST low pass Þlter. Either signal is then Þltered and goes through a limiter and exits the ASFIC as PL RX (U0200-A4). At this point the signal will appear as a square wave version of the sub-audible signal which the radio received. This signal then goes to the SLIC (U0104-E7). The SLIC must be poled periodically by the microprocessor to determine the state of bit 0 for port L (see SLIC description block for details). The microprocessor will then use that information to decode the signal. Note these paths are somewhat different for radios using Hear Clear (See Hear Clear description block for details). Audio AmpliÞcation Speaker (+) / (-) (Refer to schematic page 10-29 for reference)The output of the ASFICÕs digital volume pot, U0204-J4 is routed through a voltage divider formed by R0234 and R0235 to set the correct input level to the audio PA (U0203). This is necessary because the gain of the audio PA is 46 dB, and the ASFIC output is capable of overdriving the PA unless the maximum volume is limited. The audio then passes through C0240 which provides AC coupling and low frequency roll-off. C0242 provides high frequency roll-off as the audio signal is routed to pins 1 and 9 of the audio power ampliÞer U0203. The audio power ampliÞer has one inverted and one non-inverted output that produces the differential audio output SPK+/SPK- (U0203-4/6). The inputs for each of these ampliÞers are pins 1 and 9 respectively; these inputs are both tied to the received audio. The audio PAÕs DC biases are not activated until the audio PA is enabled at pin 8. The audio PA is enabled via AUPA EN signal from the SLIC (U0104-F7). When the base of Q0200 is low, the transistor is off and U0203-8 is high, using pull up resistor R0236 Ñ Audio PA is ON. The U0203-8 must be above 8.5 VDC to properly enable the device. If the voltage is between 3.3 and 6.4 V, the device will be active but has its input (U0203-1/9) off. This a mute condition which is not employed in this radio design. R0202 ensures that the base of Q0202 is high on power up. Otherwise there may be an audio pop due to R0236 pulling U0203-8 high before the software can switch on Q0200. The SPK+ and SPK- outputs of the audio PA have a DC bias which varies proportionately with A+ CONT (U0200-7). A+ CONT of 11 V yields a DC offset of 5 V, and A+ CONT of 17 V yields a DC offset of 8.5 V. If either of these lines is shorted to ground, it is possible that the audio PA will be damaged. SPK+ and SPK- are routed to the accessory connector (J0403-1 and 3). Only the SPK- is routed to the control head. For the internal (control head) speaker to be enabled, a jumper must be placed on the accessory connector between pins 1 and 2; this connects SPK+ to the control headÕs INT SPK+.
7-24 Controller Section Theory of Operation Handset Audio (Refer to schematic page 10-29 for reference)Certain hand held accessories have a speaker within them which require a different voltage level than that provided by U0203. For those devices RX HI is available at J0405-8. The received audio from the output of the ASFICÕs digital volume attenuator is also routed to U0202 pin 6 where it is ampliÞed 15 dB; this is set by the 10k/ 68k combination of R0238 and R0237. This signal is routed directly from the output of the op amp U202 pin 7 to J0405-8. The control head sends this signal directly out to the microphone jack. The maximum value of this output is 6.6 Vpp. If the handset is Off-Hook, the audio PA (U0203) is disabled. C0434 is for RF bypass and VR0418 is for static protection. Filtered Audio (Refer to schematic page 10-25 for reference)This signal sources receive audio or Public Address audio to a large Siren PA accessory. The ASFIC has an audio whose output at U0200-H5 has been Þltered and de- emphasized, but has not gone through the digital volume attenuator. This signal is buffered with an op amp with a gain of 0 dB, within the ASFIC. The maximum level for this signal is 1.06 Vpp. From ASFIC U0200-H5 the signal is AC coupled to U0201-6 by capacitor C0214. R0209 and R0203 being equal value set up the op amp as a unity gain device, i.e. a buffer. The output at U0201-7 is then routed to J0403-11 FIL AUD OUT. Note that any volume adjustment of the signal on this path must be done by the accessory. Discriminator Audio (UnÞltered) (Refer to schematic page 10-23 for reference)Note that discriminator audio DISC from the ZIF, in addition to being routed to the ASFIC, is also routed to the Hear Clear (U0250) and both option connectors J0408-5 and J0401-5 (See ÒHear Clear IC (Refer to schematic page 10-22 for reference)Ó on page 7-26 and ÒSecure Receive AudioÓ on page 7-24 for further information). Auxiliary RX Audio PathsThere are three auxiliary receive audio inputs that are buffered by U202 and routed to the auxiliary receive path in the ASFIC U0200-J6. The processing for this input is identical to that of normal received audio or it can bypass the Þltering and de-emphasis. The auxiliary inputs come from the two option connectors J0408-9 and J0401-9 and from the accessory connector J0403-15. The Òvoltage modeÓ signal to U0400 is 9.3 V if the source for the auxiliary receive audio from J0403 is a current source. The Òvoltage modeÓ signal is 0 V if the auxiliary receive source is a voltage source. Typically current source mode will apply for SB9600 based devices. Note that the enable line for transmission gate U0400-12/10 is the same line VOLTAGE MODE as that which controls the Auxiliary TX path AUX TX IN2. The VOLTAGE MODE line is driven by Q0202 which is turned on and off by ASFIC GCB2. In order to change the state of VOLTAGE MODE the ASFIC (U0200) must be programmed by the SPI BUS to do so. Secure Receive AudioDiscriminator audio, which is now coded audio, enters the ASFIC at U0200-J7. Inside the ASFIC a path is set up to route the coded audio to a programmable 7 bit attenuator, where the signal level is adjusted, and then out of the ASFIC at UNIV IO (U0200-B2). This path bypasses the ASFIC RX Þltering and Deemphasis. From U0200-B2 the coded audio goes to Option connectors J0401-10 / J0408-10. On the secure board, the coded signal is converted back to analog format, and then fed back through (J0401-9 / J0408-9) to the Aux Rx buffer U0202. The clear audio signal is then routed to the ASFIC pin U0200-J6; from then on it
Controller Section Theory of Operation 7-25 follows a path identical to conventional receive audio, where it is Þltered (300- 3 kHz) and deemphasis. Receive Signalling Circuits(Refer to Figure 7-5 for reference for the following sections) The ASFIC (U0200) is used to Þlter and limit all received data. The data enters the ASFIC at U0200-J7. Inside U0200 the data is Þltered according to data type (HS or LS), then it is limited to a 0-5 V digital level. The MDC and trunking high speed data appear at U0200-G4, where it connects to the mP U0103-77, software decoder, and U0104-B8, hardware decoder (see SLIC description block for further details) The low speed limited data output (PL, DPL, and trunking LS) appears at U0200-A4, where it connects to the SLIC. While receiving low speed data, the mP may output a sampling waveform, depending on the sampling technique, to U0200-C3 of between 1 and 2 kHz. The low speed data is read by the mP at twice the frequency of the sampling waveform; a latch conÞguration in the ASFIC stores one bit every clock cycle. The external capacitors C0211, C0212, and C0203 set the low frequency pole for a zero crossings detector in the limiters for PL and HS data. The hysteresis of these limiters is programmed based on the type of received data. Note that during HS data the mP may generate a sampling waveform seen at U0200-G1. Figure 7-5 Receive Signalling Paths Alert Tone CircuitsWhen the software determines that it needs to give the operator an audible feedback (for a good key press, or for a bad key press), or radio status (trunked system busy, phone call, circuit failures), it sends an alert tone to the speaker. It does so by sending SPI BUS data to U0200 which sets up the audio path to the speaker for alert tones. The alert tone itself can be generated in one of two ways: internally by the ASFIC, or externally using the mP and the ASFIC. LOW SPEED CLOCK PL INMICRO CONTROLLER DISC (DISCRIMINATOR AUDIO FROM RF SECTION) RX LIM CAPPL LIM RX LIM OUTG4 A4 ASFIC U0200 LOW SPEED LIM CAP HIGH SPEED CLOCK LIMITER DATA FILTER AND DEEMPHASIS FILTER C5J3 G1C3 J7LIMITER
7-26 Controller Section Theory of OperationThe allowable internal alert tones are 304, 608, 911, and 1823 Hz. In this case a code contained within the SPI BUS load to the ASFIC sets up the path and determines the tone frequency, and at what volume level to generate the tone. (It does not have to be related to the setting of the volume knob). For external alert tones, the mP can generate any tone within the 100-3000 Hz audio band. This is accomplished by the mP generating a square wave which enters the ASFIC at U0200-C3. Inside the ASFIC, this signal is routed to the alert tone generator; the output of the generator is summed into the audio chain just after the RX audio de- emphasis block. Inside U0200 the tone is ampliÞed and Þltered, then passed through the 8-bit digital volume attenuator, which is typically loaded with a special value for alert tone audio. Note that the Hear Clear expander is bypassed even if U0250 is present. The tone exits at U0200-J4, then is routed to the audio PA like receive audio. Hear Clear IC (Refer to schematic page 10-22 for reference)The Hear Clear (HC) is typically used for 900 MHz radios. The HC has 3 main circuit blocks within the IC which are used by this radio; 1) Compressor, 2) Flutter Fighter, and 3) Expander circuits. There are 6 enable lines on the Hear Clear IC which determine its mode of operation. The IC ENAB line U0250-C4 is tied to SW B+, so whenever the IC is placed it is always active. The remaining 5 lines are controlled by the ASFIC General Control Bit lines, GCB0, GCB1, GCB3, GCB4, and GCB5. The table below summarizes their logic states. TX1: transmit mode with carrier squelch, PL or DPL. RX1: receive voice with carrier squelch, PL or DPL. TX2: transmit mode with all other data HST/MDC/MPT/DTMF etc. RX2: refers to receive mode with all other data HST/MDC/MPT/DTMF Logic State ÒXÓ means either 1 or a 0, i.e. ÒdonÕt careÓ. Transmit Path for Radios with Hear ClearFor transmit, the signal comes from the appropriate microphone and enters the ASFIC at U0200-A7 or U0200-B6 as would standard TX audio. After entering the ASFIC, the signal is internally routed to U0200-A6 ASFIC MIC AMP OUT, where it leaves the ASFIC and enters the Hear Clear compressor at U0250-D3. The signal then exits the compressor at U0250-F3, where it is routed back to the ASFIC (U0200-C7). C0261 provides AC coupling. Inside the ASFIC the signal goes through an LPF and HPF which band limit the signal between 300 - 3 kHz. The signal is then pre-emphasized and exits the ASFIC at U0250-C8, passes through a coupling cap and enters the ASFIC at U0200-E8. Again inside the ASFIC the signal goes through a limiter, splatter Þlter, and a pair of attenuators which set the amplitude (deviation level) of the signal. The Compressor is used in transmit mode. The purpose of this circuit is twofold; 1) improve S/N ratio for low level audio, and 2) maintain the same Table 7-3 Hear Clear Enable Lines ConÞguration Logic State Name Ref. Des Set By TX1 RX1 TX2 RX2 Ic Enable U0250-C4 SW B+1 1X1 Flutter Fighter Enable U0200-B5 U0200-B5X1X0 LO Clamp Disable U0250-A5 U0200-B3111X Hi Clamp Enable U0250-C2 U0200-C40 0X0 HCI Disable U0250-B6 U0200-A31 1X1 Compander Enable U0250-D1 U0200-A21 1X0
Controller Section Theory of Operation 7-27 dynamic range of a 12.5 kHz bandwidth channel as is obtained in a 25 kHz bandwidth channel. The compressor raises low level signals and lowers high level signals. The compressor circuit produces a signal whose output voltage (U0250-F3) is based on the input voltage level (U0200-A6) of the signal. It is NOT a function of frequency (as is Preemphasis). The voltage transfer function is: COMPOUT == SQRT[ 80*ASFICMICAUDOUT ] Notice that 80 mV in yields 80 mV out. Some example levels are: - 20 mV input == 40 mV output - 80 mV input == 80 mV output - 150 mV input == 110 mV output Receive Path for Radios with Hear ClearThe audio signal enters the controller from the ZIF on DISC. The discriminated audio DISC enters the Hear Clear Flutter Fighter through C0200 and C0267. C0200 connects the signal to FF IN (U0250-E4). C0267 is the beginning of a noise sampling circuit consisting of components C0267, R0256, R0253, C0264, C0263, R0254, R0255, R0257, and C0265; and Hear Clear ports Clip Ref, Noise Filter In, and Noise Filter Out, Noise Hold. After exiting the HC at FF OUT (U0250-F4), the signal enters the ASFIC at RX IN (U0200-H6). Within the ASFIC the signal passes through a low pass Þlter and a high pass Þlter limiting the audio band width to 300-3 kHz. It then goes through deemphasis and exits the ASFIC at U0200-H5 FILTERED AUDIO. Upon exiting the ASFIC at FILTERED AUDIO, the signal passes through capacitor C0250, which provides AC coupling. The signal then enters the Hear Clear at EXP IN (U0250-C1) and exits the Hear Clear Expander at EXP OUT (U0250-A2). The normalized signal is the routed back to the ASFIC through C0260 for volume adjustment, entering at U0200-J5 and exiting the ASFIC at U0200-J4 as RX AUDIO. The audio is then routed to the Audio PA in the same manner as standard receive audio. The Flutter Fighter is for receive only. It samples the amount of Noise in the receive audio between 10 kHz and 20 kHz, using the Noise Þlter in (U0250-B5), Noise Þlter out (U0250-C6), and Noise hold (U0250-D5) ports. In addition, it monitors the rate of change of RSSI (Receive Signal Strength In) (U0250-F5). The discriminated audio DISC enters the HC at FF IN (U0250-E4) and the circuit then reduces the amount of popping Noise associated with fading. The improved audio exits the IC at FF OUT (U0250-F4). The Expander is used after deemphasis but before the ASFIC volume attenuator. The purpose of the expander is to transpose compressed audio back to ÒnormalÓ audio. As with the compressor circuit, the expander circuit adjusts the amplitude of a signal based upon its input amplitude, NOT its frequency. The voltage transfer function is: EXPOUT= 0.41*(EXPIN/0.28)2. The importance here is to notice that an input signal of 191 mV will exit as 191 mV. A smaller signal will be made even smaller and a signal larger than 191 mV will exit EXP OUT even larger.
7-28 Controller Section Theory of OperationSome example levels are: - 100 mV EXP IN == 52 mV EXP OUT - 191 mV EXP IN == 191 mV EXP OUT - 250 mV EXP IN == 327 mV EXP OUT Again this operation is NOT A FUNCTION OF FREQUENCY between 300 Hz and 3 kHz. Hear Clear Routing of Data/ SignallingAll signalling for transmit enters the transmit stream after the Hear Clear Compressor and therefore does not pass through the compressor. In receive, subaudible signalling PL/DPL goes through the Flutter Fighter along with audio, and is unaffected by the Flutter Fighter operation. After the Flutter Fighter, upon entering the ASFIC, the sub-audible signalling is separated from the audio and decoded. Subaudible signalling never passes through the expander. In receive, for all other signalling HST/MDC/MPT etc. (not sub-audible), the Flutter Fighter is set to ÒPass Through ModeÓ. In this mode the Flutter Fighter passes signals from FF IN to FF OUT without any adjustment.