Motorola Astro Digitalport Saber Troubleshooting 68p81076c10 A Manual

							 
10-1 
Troubleshooting Charts 
10
This section contains detailed troubleshooting flowcharts. These charts should be used as a guide in 
determining the problem areas. They are not a substitute for knowledge of circuit operation and astute 
troubleshooting techniques. It is advisable to refer to the related detailed circuit descriptions in the theory 
section prior to troubleshooting a radio.
Most troubleshooting charts end up by pointing to an IC to replace. It is not always noted, but is 
good practice to verify supplies and grounds to the affected IC and to trace continuity to 
the malfunctioning signal and related circuitry before replacing any IC. For instance, if a 
clock signal is not available at a destination IC, continuity from the source IC should be checked before 
replacing the source IC.
Description Page
Chart 1.  800MHz Radio Main Troubleshooting Chart................................................. 10-2
Chart 2.  VHF/UHF Radio Main Troubleshooting Chart............................................... 10-2
Chart 3.  Radio Power-Up Fail ....................................................................................... 10-3
Chart 4.  Bootstrap Fail .................................................................................................. 10-4
Chart 5.  DC Supply Failure ........................................................................................... 10-5
Chart 6.  01/81 Host ROM Checksum Failure ............................................................... 10-5
Chart 7.  01/82 or 002, External EEPROM Checksum Failure....................................... 10-6
Chart 8.  01/84 SLIC Initialization Failure .................................................................... 10-6
Chart 9.  01/88 MCU (Host µC) External SRAM Failure ............................................... 10-7
Chart 10. 01/92, Internal EEPROM Checksum Failure................................................... 10-7
Chart 11.  02/A0, ADSIC Checksum Faiure ..................................................................... 10-8
Chart 12.  02/81, DSP ROM Checksum Failure ............................................................... 10-8
Chart 13.  02/88, DSP External SRAM Failure U414........................................................ 10-9
Chart 14.  02/84, DSP External SRAM Failure U403........................................................ 10-9
Chart 15.  02/82, DSP External SRAM Failure U402...................................................... 10-10
Chart 16.  02/90, General DSP Hardware Failure .......................................................... 10-10
Chart 17.  09/10, Secure Hardware Failure .................................................................... 10-11
Chart 18.  09/90, Secure Hardware Failure .................................................................... 10-11
Chart 19.  Key Load Fail................................................................................................. 10-12
Chart 20.  Button Test.................................................................................................... 10-12
Chart 21.  Keypad Error ................................................................................................. 10-13
Chart 22.  Volume Set Error........................................................................................... 10-13
Chart 23.  Zone/Channel Select Error ........................................................................... 10-14
Chart 24.  Top/Side Button Error ................................................................................... 10-14
Chart 25.  No Display .................................................................................................... 10-15
Chart 26.  No TX Modulation ....................................................................................... 10-16
Chart 27. 800MHz No TX Deviation ............................................................................ 10-17
Chart 28.  VHF/UHF No TX Deviation .......................................................................... 10-17
Chart 29.  No RX Audio ................................................................................................. 10-18
Chart 30.  VHF/UHF/800MHz Receiver RF .................................................................... 10-19
Chart 31.  VHF/UHF Frequency Generation Unit (FGU) .............................................. 10-19
Chart 32.  800MHz Frequency Generation Unit (FGU) ................................................ 10-20
Chart 33.  VHF/UHF Voltage Controlled Oscillator (VCO)........................................... 10-21
Chart 34. 800MHz Voltage Controlled Oscillator (VCO)............................................. 10-22
Chart 35.  800MHz DC Switch ...................................................................................... 10-22
Chart 36.  VHF/UHF DC Switch .................................................................................... 10-23
Chart 37.  800MHz Transmitter RF................................................................................ 10-24
Chart 38.  VHF/UHF Transmitter RF.............................................................................. 10-25
Chart 39.  VHF/UHF Only, VCO Crossover Frequency Tune........................................ 10-26 
						

							 
10-2 
Chart 1 . 800MHz Radio Main Troubleshooting Chart
NONO
MAEPF-24396-A
Good Power-
Up Self
Test?Is There
TX Power?Is TX
Deviation
OK?
NO
NOYES
YES
YES YES
YES
YES
NONO
NO
Receive
Audio?Poor
SINAD?ENDSTARTButtons
Functioning?Radio
Keyload
Failure?
Go to No Receiver
Audio Chart C.29See Button Test
Chart C.20Error
Message?
Display
Model?
Go to No Transmit
Audio Chart C.26Go to Transmitter
Chart C.37
NO
YES
NO
YES
YES
See Keyload
Failure Chart
C.19
NOYES
Go to No Receiver
RF Chart C.30Go to DC Switch
Chart C.35 NOYES Is
R5
on?
See Table T1;
Power-up Self
Check Error Codes
Use RSS to
display
Error MessagesError
Message
on RSS?
Either Bad Display.
(See Chart C.25), or
Radio Power-Up Failure
(See Chart C.3)
 
Chart 2 . VHF/UHF Radio Main Troubleshooting Chart
NO
MAEPF-24395-A
Is There
TX Power?Is TX
Deviation
OK?START
NO
YES
YESNO
Error
Message?
Display
Model?
NO
YES
See Table T1;
Power-up Self
Check Error Codes
Use RSS to
display
Error MessagesError
Message
on RSS?
Either Bad Display.
(See Chart C.25), or
Radio Power-Up Failure
(See Chart C.3)
Good
Power-Up/
Self Test?
NOYES
YES
NO
Go to No Transmit
Audio Chart C.26Go to Transmitter
Chart C.38
NO
YES
NO
Receive
Audio?Poor
SINAD?ENDButtons
Functioning?Radio
Keyload
Failure?
Go to No Receiver
Audio Chart C.29See Button Test
Chart C.20 YES
NO
YES
YESSee Keyload
Failure Chart
C.19
Go to No Receiver
RF Chart C.30Go to DC Switch
Chart C.36 NONO
YES Is
R5
on? 
						

							 
10-3 
Chart 3 . Radio Power-Up Fail
Radio Power-Up
Failure.Verify standard
bias per table
Table 3 pertaining
to host µC.
No
Yes Standard Isolate and
repair problem.
See chart C.5bias OK?.
Using RSS,
verify radio is
not inhibited.
Signal @ U206 Source
OE* U204
WE* U204
HD0-HD7 U204
4XECLK U204
HA0-HA4,
HA14_IN, HA15_IN,
HA16,HA17 U204
CSIO1* U204
CSPROG* U204 Verify Host Port:
Use ohmmeter to
electrically verify
following signal connections
to source IC:
Signal @ U202 Source
HA0-HA13 U206
HD0-HD7 U204
MEMR/W* U206
OE* U206
CS* U211
Signal @ U211 Source
IN_B U204
IN_A U206
Synopsis
This failure assumes the radio
fails to power up correctly and
does not send any Power up
failure messages via the
display or serial bus.  Some
basic failure modes:
1) Radio is inhibited.
2) Battery voltage is low.
3) A problem exists with a
supply or system clock.
4) Host µC code is corrupted.
5) Host FLASH or RAM is
faulty.
6) Corrupted host µC
configuration register.
7) Host µC or SLIC is faulty.
1
Radio is
not inhibited or
unable to
check?
Use RSS to
clear radio
inhibit.Yes No
ReFLASH host
µC code.
Error
ReFLASHING
host µC code?
Reverify inital
problem.
Initial
problem
persists? YesNo
Yes
NoEnd.
Error in
Bootstrapping
host µC?
Yes No
Refer to section
on Failure to
Bootstrap.
Chart C.4
Refer to host µC
ROM checksum
error (FAIL 01/81).
Chart C.6
When reFLASHing
host code, there
are two
fundamental modes
of failure: 1) The
host µC fails to
respond or 2)
reports an error
in programming.
During radio power-up
Self-Test, verify
activity (transisitons
from high to low) on
U202 OE* and WE*.
Using RSS,
reinitialize host
µC
configuration
register and
reverify initial
problem.  Note:
if this requires
writing the
internal EE, the
radio must be
realigned.
Power up
failure fixed?
1No Yes End.
Connections
good?
Repair
connections. Yes No
Signals
verfied?
Replace U206.
During radio power-up
Self-Test, verify
activity (transisitons
from high to low) on
U202 CS*. No Yes
Signals
verfied?
Replace U202.
Verify operation of
U211 and logic AND
gate. During radio power
up Self-Test, verify
activity (transisitons
from high to low) on
U211 IN_B.No Yes
MAEPF-24419-A
Signals
verfied?
Replace U211.
Replace U204. 
						

							 
10-4 
Chart 4 . Bootstrap Fail
Note: This
configuration
indicates the
µC is in
Bootstrap
mode waiting
for data.
Host µC
Bootstrap Failure.
Synopsis
The host µC bootstrap mode is
used during reprogramming of
the host µC and DSP FLASH
ROMs.  Refer to appropriate
Theory of operation section for
description of bootstrap
operation.  Since the operating
code is downloaded through the
serial bus instead of from the
ROM and is initially executed in
the µC internal RAM, this is a
good method of verifying
operation of the µC.  Basic
failure modes:
1) Necessary supplies,
grounds, system clocks not
present.
2) Vpp voltage not set to
correct voltage for bootstrap
mode select or FLASH
programming.
3) Improper configuration of
mode select pins.
4) Improper operation of RESETto the host µC.
5) Improper
configuration/operation of the
host µC serial bus. Verify standard
bias per table
Table 3.
No Isolate and
repair problem.
See Chart C.5.
Yes Standard
bias OK?Verify voltage at VR207
(OPTB+/BOOT_SEL/VPP)
is: 10VDC²VPP²12.7VDC.
VPP is
correct?
Isolate open
and repair or
adjust VPP as
required.No
Yes
Verify MODA and MODB of
U204 are pulled to a logic
low state (< .8VDC).
MODA and
MODB are
correct?
Repair inverter
circuit consisting
of VR207 and
Q204.No
With the host µC out of
reset and prior to any
downloading through the
serial bus:
Verify U204-PD1
(BOOT_DATA_OUT) is logic
low and U204-PD0 is logic
high (BOOT_DATA_IN).
Yes
PD0 and PD1
are correct?
Verify
BOOT_DATA_IN and
BOOT_DATA_OUT
are isolated by
MUX U208.1
2 Yes No
In some
circumstances
additional code is
downloaded and
placed in external
RAM.  In this
case, a failure of
the external RAM
could look like a
boostrap failure.
1
2
Initiate download
and verify the
data on
BOOT_DATA_IN is
echoed out on
BOOT_DATA_OUT
.
Signals are
isolated?
Verify MUX
control on Pin
4 of U208 is
low.
Yes No
Control
voltage
correct?Repair inverter
circuit
composed of
VR207 and
Q203.
Replace U208. Yes
No
Data echoed?
Replace U204.MAEPF-24420-A
YesNo
Verify continuity
of BOOT_DATA_IN
from J201-15 to
U204-PD0.Signal good?
Yes
Verify U204 ECLK
is 1.8432 MHZ 
±200ppM.
Replace Y201.
Verify download
baud rate is 7200.
Baud rate
correct?
ECLK frequency
correct?
Isolate and
repair open. No
Fix baud rate.Yes
Yes No
No 
						

							 
10-5 
Chart 5 . DC Supply Failure
Is the
output on
U410-3
+5VDC?
NoVerify control
voltage at
Q207-4 is logic
low.
Control voltage
correct?
Check inverter
circuit of Q206
and R244.No
Replace Q207.Yes
Connect supply or
battery (B+) to radio
and turn
ON/OFF/VOLUME
CONTROL knob on.
Is B+ at
Q207-2?
DC Supply Failure
Synopsis
This failure implies a problem
with the DC power distribution.
It may relate to a battery
supply or one of the regulated
supplies.  Basic failure modes
are as follows:
1) Fuse S1 blown.
2) Open in Battery contacts or
from flex circuit through J401.
3) Defective switch Q207.
4) Open in B+_SENSE through
control top switch or
B+_SENSE not detected by µC.
5) Defective +5V regulator.
Check fuse S1.
Replace fuse.
Fuse good?
No
Locate and repair
open between
battery and VOCON
board.Yes
YesNo
Verify B+ at
Q207-5.Is B+ at
Q207-5?Is +5VDC ± 5%
at C470?Yes
Verify U409-2
> 2VDC.U409
switched
on?Yes
Check
continuity of
B+SENSE to
U409 and R423
pull-up.No
Verify L402 continuity
< 1 ½ and solder
connection to board.YesVerify Lx signal per
Fig. W1.U409 running?No
Yes
Verify integrity of
CR403, C470,  C463
and R436.
No
L402 good?
Replace L402.
Replace U409.Yes No
Yes
No
End Yes
No
Verify SW_B+
at input to
U202 and
RESET signal is
logic low.Signals
verified?Replace U202.Repair connections
back to the vocon
board through J401.
Yes
No
Verify SW_B+
at input to
U410.Replace U410.
Repair connections .
Yes
MAEPF-24399-ONo Is the
output on
U202
+5VDC?
Signals
verified?
 
Chart 6 . 01/81 Host ROM Checksum Failure
Synopsis
This failure indicates the Host
ROM program code is incorrect.
It is implied that the host
processor found and executed
enough valid code at power up
to get to the point of verifying
the rest.   Basic failure modes
are as follows:
1) The contents of U205/U210
have been corrupted.
2) The decoding logic comprised
of U204 and U206 is not
working properly due possibly
to circuit opens or shorts or
that a failure of one or more of
these ICs has occurred.
3) U205 or U210 has failed.
Due to the fact that the Host µC
successfully initialized, a
failure in one of the ICs is not
likely.
Repair opens.
Fail 01/81
Host ROM Checksum
FailureConnections
good?
No
Yes Visually inspect all
leads to U205 and
U210 with a 5x glass.
Check for operation of
U204 and U206 as
follows: During radio
power up Self-Test,
verify activity
(transisitons from high
to low) on U205/U210 -
ROM1CS*/ROM2CS*,
and OE*.
Use ohmmeter to electrically
verify following signal
connections to source IC:
Signal @ U205/U210 Source
HD0-HD7 U204
HA0-HA13 U204
HA14OUT,HA15OUT U206
HA16,HA17 U206
ROMCS1*,ROMCS2* U206
OE*,MEMR/W* U206
VCC +5V
VSS GND
Replace
U205/U210.
No
MAEPF-24421-A
Yes
Host ROM
ReFLASH
passed?No
Yes
Connections
good?
Repair opens.
Yes No
ReFLASH Host
ROM
End
Initial
operation
checks
Good?
Refer to section on
Power-up Failure C.3
and/or Fails to 
Bootstrap C.4. 
						

							 
10-6 
Chart 7 . 01/82 or 002, External EEPROM Checksum Failure
Reprogram
external EEPROM.External
EEPROM
reprogrammed?EndYes
Repair opens.
Connections
good? No
YesVerify operation of
Power-Down Reset Per
Fig. W9.
Reset
Functional?
Replace U407.
No
Yes
Fail 01/82 or 002
External EEPROM
 Checksum Failure
Use ohmmeter to electrically
verify following signal
connections to source IC:
Signal @ U201 Source
HD0-HD7 U204
HA0-HA13 U204
HA14OUT U206
EE1CS* U206
OE*,MEMR/W* U206
RESET* U407
VCC +5V
VSS GND
Check for operation of
U204 and U206 as
follows: During radio
power up Self-Test,
verify activity
(transisitons from high
to low) on U201 -
EE1CS*, and OE*.
Replace
U201.
No Yes
No
MAEPF-24415-A
Initial
operation
checks
Good?
Refer to section on
Power-up Failure C.3
and/or Fails to
Bootstrap C.4.
Synopsis
This failure indicates the
External EEPROM data
containing mostly customer
specific channel/mode
information is incorrect.
Basic failure modes are as
follows:
1) The contents of U201 has
been corrupted.  A possible
cause of this failure would be
the improper operation of the
RESET circuit during a radio
power down sequence.
2) The decoding logic comprised
of U204 and U206 is not
working properly due possibly
to circuit opens or shorts or
that a failure of one or more of
these ICs has occurred.
3) U201 has failed.
 
Chart 8 . 01/84 SLIC Initialization Failure
Fail 01/84
SLIC Init Failure
Verify standard
bias per table
Table 3 pertaining
to SLIC.
No
Isolate and
repair problem.
Yes Standard
bias OK?.Verify Host/SLIC connections:
Use ohmmeter to electrically
verify following signal
connections to source IC:
Signal @ U206 Source
OE* U204
WE* U204
HD0-HD7 U204
4XECLK U204
HA0-HA4,
HA14_IN, HA15_IN,
HA16,HA17 U204
CSIO1* U204
CSPROG* U204
Synopsis
This failure indicates a failure
in verification of the data in the
SLIC parallel programming
registers  Some basic failure
modes:
1) Missing supply or ground to
SLIC.
2) Open in parallel address bus,
data bus or associated select
lines between the host µC and
the SLIC.
3) 4xECLK missing to the SLIC.
4) SLIC is faulty.
Verify 4xECLK on SLIC;
nominal 1.8432MHz
square wave, 0-5V.
Connections
good?
Repair
connections.MAEPF-24664-A
Yes No
Signals
verfied?No
YesReplace U206.
Replace U204. 
						

							 
10-7 
Chart 9 . 01/88 MCU (Host µC) External SRAM Failure
Fail 01/88
Host µC External RAM
Failure.Verify standard
bias per table
Table 3 pertaining
to host µC.
No
Isolate and
repair problem.
Yes Standard
bias OK?.
Signal @ U206 Source
OE* U204
WE* U204
HD0-HD7 U204
4XECLK U204
HA0-HA4,
HA14_IN, HA15_IN,
HA16,HA17 U204
CSIO1* U204
CSPROG* U204 Verify Host RAM:
Use ohmmeter to
electrically verify
following signal connections
to source IC:
Signal @ U202 Source
HA0-HA13 U206
HD0-HD7 U204
MEMR/W* U206
OE* U206
CS* U211
Signal @ U211 Source
IN_B U204
IN_A U206
Synopsis
This failure indicates a failure
in the µC  external SRAM at
power up test.  Some basic
failure modes:
1) Missing supply or ground to
SLIC.
2) Open in parallel address bus,
data bus or associated select
lines between the host µC and
the SLIC and the SRAM.
3) 4xECLK missing to the SLIC.
4) SLIC is faulty.
5) Improper decoding logic due
to open or failure of U211 AND
logic gate.
6) SRAM is faullty.
Connections
good?
Repair
connections. YesNo
Signals
verfied?
During radio power up
Self-Test, verify
activity (transisitons
from high to low) on
U202 CS*. No
Yes
Signals
verfied?
Replace U202.
MAEPF-24665-B
No Yes
No Yes
Signals
verfied?
Replace U211.
Replace U204.Replace U206.
Verify operation of
U204 and U211 logic AND
gate.  During radio power
up Self-Test, verify
activity (transisitons
from high to low) on
U211 IN_B. During radio power up
Self-Test, verify
activity (transisitons
from high to low) on
U202 OE* and WE*.
 
Chart 10 . 01/92, Internal EEPROM Checksum Failure
Replace U204.
Reprogram Internal
EEPROM.
Internal
EEPROM
reprogrammed?End
No
Yes
Verify operation of
Power Down Reset Per
Fig. W9.
Reset
Functional?
Replace U407.
No
Yes
Fail 01/92
Internal EEPROM
 Checksum FailureRealign radio.
MAEPF-24407-B
Synopsis
This failure indicates the Host
µC interal EEPROM is incorrect.
This data contains, among other
things, radio tuning parameters.
Basic failure modes are as
follows:
1) The contents of the internal
EEPROM have been corrupted.
A possible cause of corrupted
data may be improper operation
of the power down RESET
circuit U407.
2) An internal failure of U204
has occurred. 
						

							 
10-8 
Chart 11 . 02/A0, ADSIC Checksum Faiure
Synopsis
The ADSIC calculates a checksum of the
configuration bus data programmed
through the Host µC SPI interface.  This
failure indicates some problem with the
data.  It should be noted that this is a
non-fatal error as it happened.  As the
ADSIC controls some of the functions of
the DSP memory mapping and
interrupts, some aspects of ADSIC
programming problems may cause a
general DSP hardware failure.  Some
operation of the ADSIC can be
determined by looking for the 8KHz @
IRQB.  This signal is present only after
the host µC has programmed the IC.
Partial operation of the device may point
to a missing supply connection.  Basic
failure modes are as follows:
1) An open or short in the DSP address
or data bus and select lines may cause
an error in reading the checksum.
2) Missing or improper 2.4 MHz clock
reference.
3) Missing signal in the Host µC SPI
programming interface.
4) Open or missing analog or digital
supply at one or more IC pads.
5) General IC failure.
Fail 02/A0
ADSIC Checksum
Failure
Use ohmmeter to electrically
verify following signal
connections to source IC:
Signal @ U406 Source
D8-D23 U405
A0-A2,A13-A15 U405
PS*,RD*,WR* U405
SELx,RSTx U204
SPD,SCLK U204
1
VDDD,VDD1,VDD2,
VDD3 +5V
VDDAb,VDDA +5VA
VSSD,VSS1,VSS2,
VSS3 GND
2
VSSA,VSSAb AGND
ABI R402
1
Note: Finding an open at VDDx
may be difficult because of low
isolation between supply pins.
2
 Also measure continuity
between GND and AGND through
jumper JU407.
Connections
good?
Repair opens.No
Verify 2.4MHz
reference clock at
U406 IDC per Fig.
W10
Clock
Present?Verify SPI
programming
signals per Fig.
W6. initiated by
mode change.
Programming
signals
verified?Verify U406-
RSTx goes high on
initial power up.
Reset high?Replace U406.
Verify clock at
ABACUS
source and/or
fix connection.
Verify SPI operation
by verifying
programming of
synthesizer IC
initiated by a channel
change.  If pass find
connection problems to
U406.  A failure
indicates a software
problem or hardware
fault with U204.
No
Yes
Yes No
Yes
MAEPF-24416-A
No Yes
Replace U204.
 
Chart 12 . 02/81, DSP ROM Checksum Failure
At radio power up,
verify U404
A14,A15,A16
transisiton to a high
logic state.  Verify
activity(transitions
 from high to low)
on U404 - CE*.
Use ohmmeter to
electrically verify
following signal
connections to source IC:
Signal @ U404 Source
D0-D7 U405
A0-A13,A17 U405
A14-A16 U406
CE* U406
OE*,WE* U405
VCC +5V
VSS GND
Replace U404
ADSIC
Good?
Replace U406NoYes
DSP ROM
ReFLASH
passed?EndNo
Yes
Repair opens.
Fail 02/81
DSP ROM Checksum
Failure
Visually inspect all
leads to U404 with
a 5x glass.
Connections
good?
No
Yes
Connections
good?
Repair opens.
Yes No
Go to section
on ADSIC
Checksum
Failure (02/A0).
Chart C.11
ADSIC
Good?
Yes
MAEPF-24417-A
ReFLASH DSP
ROM
No
Synopsis
This failure indicates the DSP
ROM program code is incorrect.
It is implied that the DSP found
and executed enough valid code
at power up to get to the point
of verifying the rest.   Basic
failure modes are as follows:
1) The contents of U404 has
been corrupted.
2) The decoding logic comprised
of U405 and U406 is not
working properly due possibly
to circuit opens or shorts or
that a failure of one or more of
these ICs has occurred.
3) U405 has failed.
Due to the fact that the DSP
successfully initialized, a
failure in one of the ICs is not
likely. 
						

							 
10-9 
Chart 13 . 02/88, DSP External SRAM Failure U414
R3SEL*
appears
functional?Yes
Replace U414.Do all three
SRAMs
exhibit a
fault?Replace U405.Yes
MAEPF-24410-ANo
No
ADSIC
checksum
error?
Refer to
section on
FAIL 02/A0.
Chart C.11YesNo
During power
up Self-Test
verify E1~ on
U414 is enabled
by high to low
transitions of
R3SEL*.
During power-up
verify operation
of U415 by
looking for
transitions on
inputs IN_B and
IN_A.
Inputs to
U415
functional?
Replace U415.
Replace U405.
Yes
No
Synopsis
On power-up the DSP writes
data to the device and then
verifies the data.  This failure
indicates the DSP SRAM failed
this pattern/checksum test.
U414 is selected by the DSP
(U405) address bus with the
addition of the OR logic gate
U415.    Basic failure modes
are as follows:
1) Some problem exists
(open/shorts) with the
external address/data bus.
2) Possible failure of the DSP
address/data bus or
RD*/WR*/PS*/DS* signals
used in selecting this part.
Since the other two DSP
SRAMs share this bus as well
as other ICs, this is not a likely
failure.
3) Operational failure of the OR
logic of gate U415.
3) Open in supply or ground to
the IC.
4) Failure of the IC.
Fail 02/88
DSP SRAM U414
Failure
Use ohmmeter to
electrically verify
following signal connections
to source IC:
Signal @ U414 Source
D0-D23 U405
A0-A12 U405
WR*,RD* U405
E1* U415-OUT
E2 U406-A15
X/Y*,V/S* GND
VCC +5V
VSS GND
Signal @ U415 Source
IN_A U405-A14
IN_B U405-A13
Connections
good?
Repair opens.Yes
No
Check for
ADSIC
programming
checksum
error.
 
Chart 14 . 02/84, DSP External SRAM Failure U403
Fail 02/84
DSP SRAM U403
Failure
Synopsis
On power-up the DSP writes
data to the device and then
verifies the data.  This failure
indicates the DSP SRAM failed
this pattern/checksum test.
Besides utiling decoding logic
from the DSP (U405), U403
has additional logic in the form
of RSEL from the ADSIC
(U406).  A problem with the
ADSIC in the form of a
programming or hardware fault
will cause a problem with the
operation of this part.    Basic
failure modes are as follows:
1) Some problem exists
(open/shorts) with the
external address/data bus.
2) Some problem exists with
the ADSIC memory select
(RSEL) which may include an
ADSIC programming problem
(SPI bus) or possibly a failed
ADSIC.
3) Possible failure of the DSP
address/data bus or
RD*/WR*/PS*/DS* signals
used in selecting this part.
Since the other two DSP
SRAMs share this bus as well
as other ICs, this is not a likely
failure.
4) Open in supply or ground to
the IC.
5) Failure of the IC.
Use ohmmeter to
electrically verify
following signal connections
to source IC:
Signal @ U403 Source
D0-D23 U405
A0-A12 U405
WR*,RD* U405
E1* U405-A15
E2 U406-RSEL
X/Y*,V/S* GND
VCC +5V
VSS GND
RSEL
appears
functional?Yes
Replace
U406.
Replace U403.
Do all three
SRAMs
exhibit a
fault?Replace U405.
MAEPF-24409-BYesNo
No
Connections
good?
Repair opens.
Yes No
Check for
ADSIC
programming
checksum
error.ADSIC
checksum
error?
Refer to
section on
FAIL 02/A0.
Chart C.11YesNo
During power
up Self-Test
verify E2 on
U403 is enabled
by low to high
transitions of
RSEL. 
						

							 
10-10 
Chart 15 . 02/82, DSP External SRAM Failure U402
Does a fault
exist with
U403?
MAEPF-24408-B
Yes
Refer to a
Fail 02/84.
Replace U402.
Do all three
SRAMs
exhibit a
fault?Replace U405.YesNo No
Connections
good?
Repair opens.
Yes No
Check for
ADSIC
programming
checksum
error.
Use ohmmeter to
electrically verify
following signal connections
to source IC:
Signal @ U402 Source
D0-D23 U405
A0-A12 U405
WR*,RD* U405
E1* U405-A15
E2 U405-A13
X/Y*,V/S* GND
VCC +5V
VSS GND
Synopsis
On power up the DSP writes
data to the device and then
verifies the data.  This failure
indicates the DSP SRAM failed
this pattern/checksum test.
U402 decoding logic consists
entirely of address lines from
the DSP (U405).  A failure in
this part would point to the
part itself or with the DSP.
However the possibility exists
for a decoding logic problem to
cause one of the other SRAMs
to overwrite U402.  This is
particularly the case with
U403 which is selected with
the RSEL signal from ADSIC
(U406).   This problem should
be investigated before
replacing any parts.   Basic
failure modes are as follows:
1) Some problem exists
(open/shorts) with the
external address/data bus.
2) Possible failure of the DSP
address/data bus or
RD*/WR*/PS*/DS* signals
used in selecting this part.
Since the other two DSP
SRAMs share this bus as well
as other ICs, this is not a likely
failure.
3) Open in supply or ground to
the IC.
4) Failure of the IC.
Fail 02/82
DSP SRAM U402
FailureADSIC
checksum
error?
Refer to
section on
Fail 02/A0.
Chart C.11YesNo
Due to the
possibilityof a
failure causing
a RAM overlap
U403 should be
verified.
 
Chart 16 . 02/90, General DSP Hardware Failure
Fail 02/90
DSP Hardware
FailureVerify standard
bias per table
Table 3.
No Isolate and
repair problem.
See Chart C.5
Yes Standard
bias OK?.
Reflash DSP
code.Unable to
Reflash
DSP code?
Fail
02/90
persists?
Verify Host Port:
Use ohmmeter to
electrically verify
following signal connections
to source IC:
Signal @ U405 Source
H0-H7 U204
HA0-HA2 U204
HR/W* U204
HEN* U204
RESET U204
On power up, verify
transitions on HEN* from
high to low indicating DSP
is being selected.
Synopsis
On power-up the host µC sends
several handshake commands
through the host interface to
the DSP system to coordinate
the power up programming of
the ADSIC and detect any DSP
power up status messages..
This error indicates the host
never received a response
from the DSP.  The power up
code is downloaded from U404
and executed internally in the
DSP.  This is a wide ranging
problem which may be difficult
to isolate without special tools.
Some basic failure modes:
1) Some fundamental system
clocks or supplies are not
operational.
2) Improper operation of the
ADSIC memory mapping
functions.
3) Corrupted DSP FLASH
program code.
4) Hardware problem with host
µC/DSP interface.
5) Improper configuration of
MODA and MODB by ADSIC.
6) DSP_RST* not operating
correctly.
7) ADSIC not functional due to
missing 2.4MHz reference. Yes No
No
Yes End.
Verify D23 is
pulled high
through R404
at power up..Replace U405.D23 is
high?
Yes
No
Repair problem
with R404.
FLASH
programming
error
generated?NoRefer to
section on DSP
ROM failure
(Fail 02/81).
Chart C.12Yes
At power up
verify state of
MOD select
pins on DSP
when RESET
goes high:
MODA High
MODB Low.MOD pins
correct?
YesNo
Verfiy
operation and
continuity of
RSTx on U406.
On power up,
Signal should
transition
from low to
high.ADSIC RESET
functional?
Replace U204. No
Yes
Verify 2.4
MHz reference
on U406-IDC
per Fig W10.
*Note
frequency may
be off, if
sequence was
aborted before
ABACUS was
programmed.Reference
present?Yes
MAEPF-24414-A
No
Replace U406.
Verify
operation of
ABACUS IC
and repair as
necessary.
Host port
operation
verfied?
Repair opens
as necessary.
No activity
exists on
pins when
measured on
U204 at power
up may
indicate a bad
µC.  If this is
the case
replace U204.
Replace U405.Yes No