Mitel SX-200 DIGITAL Pabx Engineering Information Manual

Engineering Information 
Universal card contaipns one 8 bit MC68121 CPU supported by 4 kbytes 
of EPROM, which formats and controls the routirig of data between the 
system PCM bus and the console. 
8.08 On each analog trunk circuit card is an MC6802 CPU with up to 
4k bytes of PROM that controls functions such as seizing and 
releasing trunk circuits. 
Digital Switching 
8.09 The SX-200@ DIGITAL PABX uses a specially developed very 
large scale integrated (VLSI) circuit to implement the analog-...

Engineering Information 
, 
CONTROLLER 
3 DATA LINKS 
7877R’IEl 
Figure 8-1 SX-200” DIGITAL PABX System Architecture (480-Port Configuration) 
Page 8-3  

Engineering Information 
- 
0,4Y 1 AND BAY 2 - - -- 
-- 
-- 
MAIN CONTROL CARD --- 
MAINTENANCE 
TO/FROM 
PERIPHERAL 
DEVICES 
8 
VOICAW’~TA 
8 VOICE/DATA 
CARDS 
I 
KAOlBORlEl 
Figure 8-2 SX-ZOO@ DIGITAL PABX System Architecture (338-Port Configuration) 
Page 8-4  

Engineering Information 
% RAM SPACE 
70 
KA0051ROEO 
KA0052ROEI 
Figure 8-3 Memory Availability V.S. Number of Programmed Devices 
% RAM SPACE 
I 10 15 20 
25 30 
DIGITS (x.1000) 
Figure 8-4 Memory Availability V.S. Number of Abbreviated Dial Digits 
Page 8-5  

Engineering Information 
% RAM SPACE 
50 
40 
30 
20 
10 
5 10 
15 20 
25 30 
ARS DIGITS h1000) 
KA0053ROEC 
Figure 8-5 Memory Availability V.S. Number of ARS Digits 
_ 
NUMBER OF LINE APPEARANCES 
NOTE: All programmable SUPERSET key appearances take up space 
(Direct trunk select. Private line. Direct he select. Key he. 
Multiple call line, Personal outgoing line). 
KAOOSOROEI 
Figure 8-6 Memory Availability V.S. Number of SUPERSET@ Key Appearances 
Page 8-6  

Engineering Information 
ACCOUNT CODE DIGITS (x10001 
KAOO44ROEO 
Figure 8-7 Memory Availability V.S. Number of Account Code Digits 
Main Control Card 
8.13 The Main Control card is the highest level in the intelligence 
hierarchy of the SX-200@ DIGITAL PABX. It contains the follow- 
ing: 
l 
l 
Message interface (HDLC).  68000 CPU 
EPROM containing system power-up routines 
Dynamic RAM 
Flop.py disk interface circuitry for two 5.25 inch drives 
Two communication Ports (UARTs) 
Digital Signal Processor...

Engineering information 
Peripheral Switch 
8.15 The purpose of the peripheral switch is to concentrate the 
circuit switch links from up to 12 digital peripheral cards (and 
18 links) on one side, down to the six links provided by the circuit 
switch matrix on the other side. Note that only Bays 1 and 2 are 
switched through the peripheral switch. The peripheral switch com- 
prises three DX chips; one concentrates Bay 2 and two concentrate 
Bay 1. 
Message Subsystem 
8.16 The function of the message...

Engineering Information 
TABLE 8-1 
SX-200@ PCM CIRCUIT SWITCH LINK ASSIGNMENTS 
iDLC message system 
Digital Signal Processor link 
Bay 3 voice link (lower shelf), ringing 
reference 
Bay 3 voice link (upper shelf), message 
link (HDLC) 
Bay 3 voice link (shared) 
Bay 4 voice link (lower shelf), ringing 
reference 
Bay 4 voice link (upper shelf), message 
link (HDLC) 
Bay 4 voice link (shared) 
Bay 1 voice link (lower shelf) 
Bay 1 voice link (lower shelf) 
Bay 1 voice link (upper shelf) 
Bay 1 voice...

Engineering information 
TABLE 8-2 
PERIPHERAL INTERFACE CARDS 
control-over-voic 
Speech Path Accessing - Digital 
8.20 For each digital peripheral interface card, there are 1.5 PCM 
links allocated, connecting it to the circuit switch-matrix on the 
Main Control card. Under control of the Main Control card (via the 
message subsystem), the transmit and receive channels of an originat- 
ing circuit can be connected to the receive and transmit channels of 
any other circuit through the circuit switch...

Engineering Information 
LINE CARD 
NUMBER 1 
006 
EQUIPMENT 
NUMBER 0 
00s 1713ROE  1 
2 
3 
L-4 -5 
El= 6 
7 
e 8 
9 
10 
11 
- 
16 
17 
18 
19 
24 
25 
26 
29 
29 
30 
MUSIC 
ON HOLD SPEECH 
PATHS 
Figure 8-8 Analog Speech Paths 
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