Motorola Astro Digitalport Saber Detailed 68p81076c10 A Manual

							7-18
the ROM in the P: memory space. PS* is used to select A17 to provide 
an additional 128k bytes of space in Dx: memory space for the ROM.
The ADSIC internal registers are decoded internally and start at $E000 
in Dy:. These registers are decoded using A0-A2, A13-15, and PS* from 
the DSP. The ADSIC internal registers are 16 bit wide so only D8-D23 
are used.
The DSP program code is stored in the FLASH ROM U404. During 
normal modes of operation, the DSP moves the appropriate program 
code into the three SRAMs U402, U403, and U414 and internal RAM 
for execution. The DSP never executes program code from the FLASH 
ROM itself. At power-up after reset, the DSP downloads 512 words 
(1536 bytes) from the ROM starting at $C000 and puts it into the 
internal RAM starting at $0000 where it is executed. This segment of  Figure 13 .  Vocoder Memory Mapping
$0000$01FF
$0FFF
$0200$1000$1FFF
$E000$DFFF
$2000$7FFF
$FFFF
$8000
Dy Dx P
ADS Vectors
ADSIC
Registers
$9FFF$A000
External ROM
16KB Physical
Banks
$00000-1FFFF
Internal P RamADS P RamExternal ROM
16KB Physical
Banks
$20000-3FFFF
Internal X RomInternal Y RomInternal Dx RamADS Dx RamInternal Dy RamADS Dy Ram
External
RAM
U403 External
RAM
U402External
RAM
U414 
						

							7-19
program code contains the interrupt vectors and the reset vector and 
is basically an expanded bootstrap code. When the MCU messages the 
DSP that the ADSIC has been configured, the DSP overlays more code 
from the ROM into external SRAM and begins to execute it. Overlays 
occur at different times when the DSP moves code from the ROM into 
external SRAM depending on immediate mode of operation, such as 
changing from transmit to receive.
MCU System ClockThe MCU (U204) system clock is provided by circuitry internal to the 
MCU and is based on the crystal reference, Y201. The nominal 
operating frequency is 7.3728MHz. This signal is available as a clock at 
4XECLK on U204 and is provided to the SLIC (U206) for internal clock 
timing. The MCU actually operates at a clock rate of 1/4 the crystal 
reference frequency or 1.8432MHz. This clock is available at ECLK on 
U204.
The MCU clock contains a crystal warp circuit comprised of L201, 
Q205, and C228. This circuit is controlled by an I/O port (PA6) on the 
MCU. This circuit moves the operating frequency of the oscillator 
about 250ppM on certain receive channels to prevent interference 
from the MCU bus noise.
DSP System ClockThe DSP (U405) system clock, DCLK, is provided by the ADSIC (U406). 
It is based off the crystal reference, Y401, with a nominal operating 
frequency of 33.0000MHz. ADSIC contains an internal clock divider 
circuit which can divide the system clock from 33MHz to 16.5 or 
8.25MHz operation. The DSP controls this divider by writing to the 
ADSIC parallel registers. This frequency is determined by the processes 
the DSP is running and is generally configured to the slowest operating 
speed possible to reduce system power consumption.
The additional circuitry of CR402, L403, C459, C467, C491, and C490 
make up a crystal warp circuit. This circuit is controlled by the OSCw 
signal from ADSIC which is configured by the host through the SPI 
bus. This circuit moves the operating frequency of the oscillator about 
400ppM on certain receive channels to prevent interference from the 
DSP bus noise.
Radio 
Power-Up/
Power-Down 
SequenceRadio power-up begins when the user closes the radio on/off switch on 
the control top. This enables 7.5Vdc on the B+_SENSE signal. This 
signal enables the pass element Q207 through Q206 enabling SW_B+ 
to the VOCON board and transceiver board. B+_SENSE also enables 
the +5Vdc regulator U409. When +5Vdc has been established, it is 
sensed by the supervisory IC U407. U407 disables the system reset 
through the delay circuit R481 and C482.
When the MCU comes out of reset, it fetches the reset vector in ROM 
at $FFFE, $FFFF and begins to execute the code this vector points to. It 
configures the SLIC through the parallel bus registers. Among other 
things it enables the correct memory map for the MCU. It configures 
all the transceiver devices on the SPI bus. The MCU then pulls the 
ADSIC out of reset and after a minimal delay the DSP also. It then 
configures the ADSIC through the SPI bus configuring among other  
						

							7-20
things, the DSP memory map. While this is happening, the DSP is 
fetching code from the ROM U404 into internal RAM and beginning 
to execute it. It then waits for a message from the MCU that the ADSIC 
has been configured, before going on.
During this process, the MCU does power diagnostics. These 
diagnostics include verifying the MCU system RAM and verifying the 
data stored in the internal EEPROM, external EEPROM, and FLASH 
ROMs.   The MCU queries the DSP for proper status and the results of 
DSP self tests. The DSP self tests include testing the system RAM, 
verifying the program code in ROM U404, and returning the ADSIC 
configuration register checksum. Any failures cause the appropriate 
error codes to be sent to the display. If everything is OK, the 
appropriate radio state is configured and the unit waits for user input.
On power-down, the user opens the radio on/off switch removing the 
B+_SENSE signal from the VOCON board. This does not immediately 
remove power as the MCU holds this line active through B+_CNTL. 
The MCU then saves pertinent radio status data to the external 
EEPROM. Once this is done, B+_CNTL is released shutting off SW_B+ 
at Q207 and shutting down the 5Vdc regulator U409. When the 
regulator slumps to about 4.6Vdc, the supervisory IC U407 activates a 
system reset to the SLIC which in turn resets the MCU. 
						

							8-1
Secure Modules 
8
IntroductionThe secure modules are designed to digitally encrypt and decrypt voice 
and ASTRO data in ASTRO SABER™ radios. This section covers the 
following secure modules:
•NTN7770 • NTN1152
•NTN7771 • NTN1153
•NTN7772 • NTN1158
•NTN7773 • NTN1147
•NTN7774 • NTN1367
•NTN7329 • NTN1368
•NTN7332 • NTN1369
•NTN7331 • NTN1370
•NTN3330 • NTN1371
•NTN7370 • NTN8967
•NTN1146
NOTE:The secure modules are NOT serviceable. The
information contained in this chapter is only
meant to help determine whether a problem is due
to a secure module or the radio itself.
The secure module uses a custom encryption integrated circuit (IC) 
and an encryption key variable to perform its encode/decode function. 
The encryption key variable is loaded into the secure module, via the 
radio’s universal (side) connector, from a hand-held, key variable 
loader (KVL). The encryption IC corresponds to the particular 
encryption algorithm purchased. The encryption algorithms and their 
corresponding kit numbers are:
KITS:
DVP NTN7770
DES NTN7771
DES-XL NTN7772
DVI-XL NTN7773
DVP-XL NTN7774
DVI-XL & DVP   NTN7329
DES-XL & DVP  NTN7332
DES-XL & DVP-XL  NTN7731
DVP & DVP-XL NTN7330
DVP-XL & DVI-XL  NTN7370
All, except DVP
NTN8967
TANAPAS:
DVP
NTN1146
DES NTN1152
DES-XL NTN1153
DVI-XL NTN1158
DVP-XL NTN1147
DVI-XL & DVP   NTN1367
DES-XL & DVP   NTN1368
DES-XL & DVP-XL   NTN1369
DVP & DVP-XL   NTN1370
DVP-XL & DVI-XL NTN1371 
						

							8-2
Circuit DescriptionThe secure module operates from three power supplies (UNSW_B+, 
SW_B+, and +5V). The +5V and the SW_B+ are turned on and off by 
the radio’s on/off switch. The UNSW_B+ provides power to the secure 
module as long as the radio battery is in place.
Key variables are loaded into the secure module through connector 
J601, pin 15. Up to 16 keys (depending on the type of encryption 
module) can be stored in the module at a time. The key can be infinite 
key retention or 30-seconds key retention, depending on how the code 
plug is setup.
The radio’ s host processor communicates with the Secure Module on 
the Serial Peripheral Interface (SPI) bus. The host processor is the 
master on this bus, while the secure module is a slave on the bus. The 
SPI bus consists of five signal lines. Refer to Table 1 for signal 
information. A communications failure between the host processor 
and the secure module will be indicated as an “EE E E
RR R R
RR R R
OO O O
RR R R
      
00 0 0
99 9 9
// / /
11 1 1
00 0 0
” message 
on the radio display.
Troubleshooting
Secure OperationsRefer to the Basic Service Manual, Motorola publication number 
68P81076C05 for disassembly and reassembly information. A key 
variable loader (KVL) and oscilloscope are needed to troubleshoot the 
secure module.
NOTE:The secure module itself is not serviceable. If the
secure module is found to be defective, it must be
replaced.
Error 09/10, 
Error 09/90The ASTRO Digital XTS 3000 radio automatically performs a self test 
on every power-up. Should the radio fail the self tests, the display will 
show “EE E E
RR R R
RR R R
OO O O
RR R R
      
00 0 0
99 9 9
// / /
11 1 1
00 0 0
” or “EE E E
RR R R
RR R R
OO O O
RR R R
      
00 0 0
99 9 9
// / /
99 9 9
00 0 0
” accompanied by a short beep. 
If the display shows “EE E E
RR R R
RR R R
OO O O
RR R R
      
00 0 0
99 9 9
// / /
11 1 1
00 0 0
” or “EE E E
RR R R
RR R R
OO O O
RR R R
      
00 0 0
99 9 9
// / /
99 9 9
00 0 0
,” the radio failed 
the secure power-up tests and the host microcontroller was unable to 
communicate with the secure module via the SPI bus. Turn the radio 
off and back on. If the radio still does not pass the self tests, then a 
problem exists with the secure operations of the radio.
Troubleshooting information for “EE E E
RR R R
RR R R
OO O O
RR R R
      
00 0 0
99 9 9
// / /
11 1 1
00 0 0
” is found in 
Troubleshooting Charts.
KeyloadWhen the keyloading cable is attached to the ASTRO Digital XTS 3000 
radio and “KK K K
EE E E
YY Y Y
LL L L
OO O O
AA A A
DD D D
II I I
NN N N
GG G G
” is not displayed on the radio’s display, then 
the radio has not gone into KEYLOAD mode. For troubleshooting 
“KEYLOAD” failure, refer to Troubleshooting Chart, “Key Load Fail.” 
NOTE:ASTRO Digital SABER radios need a keyloader
that has the ability to keyload an ASTRO Digital
SABER radio. The keyloader must be either a “T -
- - - CX” or a “T - - - - DX” keyloader. 
						

							9-1
Troubleshooting
Procedures
9
Introduction The purpose of this section is to aid in troubleshooting a malfunctioning 
ASTRO Digital SABER radio. It is intended to be detailed enough to localize the 
malfunctioning circuit and isolate the defective component.
Handling 
PrecautionsComplementary metal-oxide semiconductor (CMOS) devices, and other high-
technology devices, are used in this family of radios. While the attributes of 
these devices are many, their characteristics make them susceptible to damage 
by electrostatic discharge (ESD) or high-voltage charges. Damage can be latent, 
resulting in failures occurring weeks or months later. Therefore, special 
precautions must be taken to prevent device damage during disassembly, 
troubleshooting, and repair. Handling precautions are mandatory for this 
radio, and are especially important in low-humidity conditions. DO NOT 
attempt to disassemble the radio without observing the following handling 
precautions.
1. Eliminate static generators (plastics, Styrofoam, etc.) in the work area.
2. Remove nylon or double-knit polyester jackets, roll up long sleeves, and 
remove or tie back loose hanging neckties.
3. Store and transport all static-sensitive devices in ESD-protective 
containers.
4. Disconnect all power from the unit before ESD- sensitive components 
are removed or inserted unless otherwise noted.
5. Use a static-safeguarded workstation, which can be accomplished 
through the use of an anti-static kit (Motorola part number 01-
80386A82). This kit includes a wrist strap, two ground cords, a static-
control table mat and a static-control floor mat. For additional 
information, refer to Service and Repair Note SRN-F1052, “Static Control 
Most of the ICs are static sensitive 
devices. Do not attempt to troubleshoot 
or disassemble a board without first 
referring to the following Handling 
Precautions section.
!
C a u t i o n 
						

							9-2
Equipment for Servicing ESD Sensitive Products,” available from 
Literature Distribution.
Motorola
Literature Distribution
2290 Hammond Drive
Schaumburg, IL 60173
(708) 576-2826
6. Always wear a conductive wrist strap when servicing this 
equipment. The Motorola part number for a replacement wrist 
strap that connects to the table mat is 42-80385A59.
Voltage 
Measurement and 
Signal TracingIt is always a good idea to check the battery voltage under load. This 
can be done by measuring the OPT_B+ pin at the universal connector 
on the back of the radio, with the radio keyed. The battery voltage 
should remain at or above 7.0Vdc. The battery should be recharged or 
replaced as necessary prior to analyzing the radio.
In most situations, the problem circuit may be identified using a dc 
voltmeter, RF millivoltmeter, and oscilloscope (preferably with 
100MHz bandwidth or more). The “Recommended Test Equipment, 
Service Aids, and Tools” section in the ASTRO Digital SABER Portable 
Radios Basic Service Manual outlines the recommended tools and 
service aids which would be useful. Of special note is the REX-4200A 
Housing Eliminator, which allows the technician to open the radio to 
probe points while in operation.
In some cases dc voltages at probe points are shown in red on the 
schematics. In other areas diagrams are included to show time varying 
signals which should be present under the indicated circumstances. It 
is recommended that a thorough check be made prior to replacement 
of any IC or part. If the probe point does not have a signal reasonably 
close to the indicated one, a check of the surrounding components 
should be made prior to replacing any parts. 
When checking a transistor or module, 
either in or out of circuit, do not use an 
ohmmeter having more than 1.5 volts 
dc appearing across test leads or use an 
ohms scale of less than x100.
!
C a u t i o n 
						

							9-3
Power-Up 
Self-Check 
ErrorsEach time the radio is turned on the MCU and DSP perform some 
internal diagnostics. These diagnostics consist of checking the 
programmable devices such as the FLASH ROMs, internal and external 
EEPROMs, SRAM devices, and ADSIC configuration bus checksum. At 
the end of the power-up self-check routines, if an error exists, the 
appropriate error code is displayed on the display. For non-display 
radios, the error codes may be read using the Radio Service Software 
(RSS) from the SB9600 bus on the universal connector. The following 
lists valid checksums, the related failure, and a reference section for 
investigating the cause of the failure.
Error Description Page
Code
01/81 Chart 6.  01/81 Host ROM Checksum Failure  . . . .  10-5
01/82 Chart 7.  01/82 or 002, External EEPROM 
Checksum Failure. . . . . . . . . . . . . . . . . . .  10-6
01/84 Chart 8.  01/84 SLIC Initialization Failure  . . . . . . .  10-6
01/88 Chart 9.  01/88 MCU (Host µC) 
External SRAM Failure . . . . . . . . . . . . . . .  10-7
01/92 Chart 10. 01/92, Internal EEPROM 
Checksum Failure. . . . . . . . . . . . . . . . . . .  10-7
02/A0 Chart 11.  02/A0, ADSIC Checksum Faiure  . . . . . . .  10-8
02/81 Chart 12.  02/81, DSP ROM Checksum Failure  . . . .  10-8
02/88 Chart 13.  02/88, DSP External SRAM Failure U414 .  10-9
02/84 Chart 14.  02/84, DSP External SRAM Failure U403 .  10-9
02/82 Chart 15.  02/82, DSP External SRAM Failure U402  10-10
02/90 Chart 16.  02/90, General DSP Hardware Failure . .  10-10
09/10 Chart 17.  09/10, Secure Hardware Failure . . . . . . .  10-11
09/90 Chart 18.  09/90, Secure Hardware Failure . . . . . . .  10-11
001 Chart 31.  VHF/UHF Frequency 
Generation Unit (FGU)  . . . . . . . . . . . . .  10-19
001 Chart 32.  800MHz Frequency 
Generation Unit (FGU)  . . . . . . . . . . . . .  10-20
002 Chart 7.  01/82 or 002, External EEPROM 
Checksum Failure. . . . . . . . . . . . . . . . . . .  10-6
In the case of multiple errors, the codes are logically OR’d and the 
results displayed. As an example, in the case of an ADSIC checksum 
failure and a DSP ROM checksum failure, the resultant code would be 
02/A1. Following is a series of troubleshooting flowcharts which relate 
to each of these failure codes.
Power-Up SequenceUpon RESET* going active, the MCU begins to execute code which is 
pointed to by the vector stored at $FFFE, $FFFF in the FLASH ROM. The 
execution of this code is as follows:
1. Initialize the MCU (U204). Green LED on.
2. Initialize the SLIC (U206).
3. CONFIG register check. If the CONFIG register is not correct, the 
MCU will repair it and loop. 
4. Start ADSIC/DSP: 
-Bring the ADSIC reset line high.
-Wait 2ms.
-Bring the DSP reset line high. 
						

							9-4
5. Start EMC: 
-Set the EMC wake-up line low (emc irq line).
-Wait 5ms. 
-Set the EMC wake-up line high.
-Wait 10ms. 
-Set the EMC wake-up line low (emc irq line).
-Wait 5ms.
-Set the EMC wake-up line high.
6. Begin power-up self-tests.
7. Begin RAM tests:
-External RAM ($1800-3FFF).
-Internal RAM ($1060-$1300).
-External RAM ($0000-$0DFF).
-Display 01/88 if failure.
The radio will get stuck here if the internal RAM is defective. The radio 
uses the internal RAM for stack. The RAM routines use subroutines. 
Thus, if the internal RAM is defective, the radio will get lost testing the 
external RAM. 
8. Display “Self Test” (these routines use subroutines too). It is 
almost impossible to display an error message if the internal 
RAM is defective.
9. Begin MCU (host µC) ROM checksum test.
-Fail 01/81 if this routine fails.
10. Begin DSP power-up tests. The MCU will try this five times 
before it fails the DSP test.
-Check for HF2.
Fail 02/90 if 100ms.
-Program the ADSIC.
-Wait for the DSP power-up message.
- Fail 02/90 if 300ms.
- Fail 02/90 if wrong message from the DSP.
-Wait for the DSP status information.
- Fail 02/90 if 100ms.
- Fail 02/88 if DSP RAM (U414) fails.
- Fail 02/84 if DSP RAM U403 fails.
- Fail 02/82 if DSP RAM U402 fails. 
						

							9-5
- Fail 02/81 if DSP RAM fails.
-Wait for the ADSIC checksum.
- Fail 02/90 if 100ms.
- Fail 02/90 if failure.
-Wait for the first part of the DSP version number. 
- Fail 02/90 if 100ms.
-Wait for the second part of the DSP version number. 
- Fail 02/90 if 100ms.
11. Display errors if a fatal error exists at this point.
12. Checksum the codeplug.
-Test internal codeplug checksums. 
- Fail 01/92 if failure.
-Test external codeplug checksums. 
- Error 01/82 if non-fatal error; fail 01/82 if fatal error.
13. Power-up the EMC (if it is enabled in the codeplug).
14. Turn off the green LED.
15. Start up operating system.