HP 9000 Dclass Manual
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6GB(HP9000rp3410server),24GB(HP9000rp3440serverwith2GBDIMMsinstalled inall12slots),or — —32GB(HP9000rp3440serverwith4GBDIMMsinstalledinthefirsteightslots) •FortheHP9000rp3410server,DIMMsareasfollows: —256MB,512MB,and1GB —standard184pins2.5V —DDR266,CL2,registered,ECC •FortheHP9000rp3440server,DIMMsareasfollows: —256MB,512MB,and1GB,2GB,4GB —standard184pins2.5V —DDR266,CL2,registered,ECC •Onlyonesupportedconfigurationfor4GBDIMMs;2quads(8DIMMs);andnootherDIMMs canbeinstalled. •DIMMsloadedbyquadsenableinterleavedmodeandchipspare. •Memoryisloadedacrossbothmemorybusses(twoDIMMsoneachbus)toensuremaximum bandwidthandperformance. •133MHzmemorybusfrequency,266MTransfers/sdata,8.5GB/speakdatabandwidth. •Totalmemorybandwidthis8.5GB/s,splitacrosstwo4.25GB/smemorybuses. •Openpagememorylatencyis80nanoseconds. PCIRiser Two(HP9000rp3410server)orfour(HP9000rp3440server)independentPCI-X133MHz64-bit 3.3V15Wslots.No5Vcardandhot-pluggablesupport. InternalCoreI/O ThefollowingissupportedontheHP9000rp3410andrp3440servers: •Dual-channelSCSIU160interface,twointernal68-pinconnectors,one68-pinexternal connector. •SCSIbackplaneconfiguredeitherastwochannelswith2+1drives.ASAF-TEaccessory (currentlynotavailable)isrequiredtoconfiguretheSCSIbackplaneasonechannelwith threedrives. •ThreeinternalSCSIdriveconnectorsareofthe80-pintypeandprovidedriveelectrical hot-pluggablecapability. •SCSIbackplaneisdesignedtosupportaSCSImanagementpiggyboardaccessorythat providesaSCSImanagementSAF-TEchipandshuntsthebackplane'schannelsAandBto providethreedisksonchannelAandleaveonlytheexternalconnectoronchannelB. •OneinternalIDEconnectorforaslim-lineopticaldevice(CDandDVD). •Nofloppyconnector. ExternalCoreI/O ThefollowingissupportedontheHP9000rp3410andrp3440servers: •OneSCSIU16068-pinconnector. •One10/100/1000Base-TEthernetLANconnectorsforcoppercable. •FourUSB2.0ports. •ThreeDB-9ports(console,UPS,andmodem)througha3-connectorMcable. PowerSupplyUnit ThefollowingissupportedontheHP9000rp3410andrp3440servers: DetailedServerDescription21
•650Woutputpower. •Thepowersupplyissplitinafrontendblock(theactualpowersupplycase)thatconverts thelinevoltageintohighDCvoltageandbackendvoltageregulationmodules(onthe motherboard)thatstepdownthefrontendDCvoltagetotherequiredvoltages. •Redundantandhot-pluggablepowersupplies(frontendblockonly). SystemBoardManageability ThefollowingissupportedontheHP9000rp3410andrp3440servers: •BaseboardManagementController(BMC). •TemperaturemonitoringandfansregulationbyBMC. •BMCmanageabilityconsolesharedwithsystemconsole/generalpurposeserialport. •IPMIprotocolforcommunicationbetweenBMC/system/iLOMP. •HardwarediagnosticsbyBMCdisplayedonthefrontstatuspanel. •Locatorfront/rearLEDs. •FieldreplacementunitsmonitoringbyBMC. EnhancedServerManageabilityUsingtheiLOMP ThefollowingissupportedontheHP9000rp3410andrp3440servers: •LANTelnetconsole •WebGUI •Serialportforlocalconsole •Serialportformodemconsole •Duplicationofconsolescreencontentacrossallconsoles HardDiskDrives Threehalf-heightharddiskdrives(1-inchheight). InternalRAID ThefollowingissupportedontheHP9000rp3410andrp3440servers: •TheA9890AandA9891ARAIDcardsaresupportedtoprovideRAIDfortheembedded drives. •TheA9827AcablingkitisrequiredforinternalRAID.SeetheHP9000rp3410andHP9000 rp3440UpgradeGuideforcompleteRAIDinstallationinstructions. Firmware Firmwareconsistsofmanyindividuallylinkedbinaryimagesthatareboundtogetherbyasingle frameworkatruntime.Internally,thefirmwareemploysasoftwaredatabasecalledadevice treetorepresentthestructureofthehardwareplatformandtoprovideameansofassociating softwareelementswithhardwarefunctionality. ThefirmwareincorporatestheBootConsoleHandler(BCH)whichprovidesaninterfacebetween theoperatingsystemandtheplatformfirmware. ThefirmwaresupportstheHP-UX11iversion1(andhigherHP-UXversionsthatsupport PA-RISCsystems)operatingsystemthroughtheHP9000processorfamilystandardsand extensions,andhasnooperatingsystem-specificfunctionalityincluded.Theoperatingsystem ispresentedwiththesameinterfacetothesystemfirmware,andallthefeaturesareavailableto theoperatingsystem. 22Overview
EventIDsforErrorsandEvents TheserverfirmwaregenerateseventIDssimilartochassiscodesforerrors,events,andforward progresstotheIntegratedLight-OutManagementProcessor(iLOMP)throughcommonshared memory.TheiLOMPinterpretsandstoreseventIDs.Reviewingtheseeventshelpsyoudiagnose andtroubleshootproblemswiththeserver. DimensionsandValues Table1-1liststhedimensionsandvaluesoftheHP9000rp3410andrp3440servers. Table1-1ServerDimensionsandValues ValuesDimensions 26.8in(67.9cm)max.x19.0in(48.3cm)x3.4in(8.6cm) 26.6in(67.5cm)x11.6in(29.5cm)x19.5in(49.4cm) Rackdimensions(depthxwidthxheight) Pedestaldimensions(depthxwidthxheight) Minimum:38.6lb(17.5kg) Maximum:49.0lb(22.2kg) Minimum:49.4lb(22.4kg) Maximum:56.3lb(25.5kg) Rackweight Pedestalweight 0.2m2(2.1sq.ft.)Pedestalfootprint 2URackunits SystemBoard Thissectionprovidesablockdiagramofthesystemboardanddescriptionsofkeycomponents (integratedcircuits)onthesystemboard. Figure1-5showsthesystemboardblockdiagram. DetailedServerDescription23
Figure1-5SystemBoardBlockDiagram SystemBoardComponents Thefollowingdescribesthemaincomponentsofthesystemboard: •DualPA-RISCprocessors: —OneortwoprocessorsenabledintheHP9000rp3410server —One,two,orfourprocessorsenabledintheHP9000rp3440server •ZX1I/Oandmemorycontroller •ZX1PCIbuscontroller •Processordependenthardwarecontroller •Fieldprocessorgatearraycontroller •BMC •SCSIcontroller •IDEcontroller •USBcontroller •10/100/1000LAN PARISCProcessor ThesystemboardconsistsoftwoZeroInsertionForce(ZIF)processorsockets,theCoreElectronic Complex(CEC),andcircuitsforclockandpowergenerationanddistribution,boundaryscan, In-targetProbe(ITP),anddebug. TheFrontSideBus(FSB)istheIA64processorbusbasedonbusprotocolfromIntel.Thisenables processorcustomerself-repair(CSR)partstobedroppedin,providedthatelectricaland 24Overview
mechanicalcompatibilityandsupportcircuitryexist.AprocessorCSRconsistsofadualprocessor modulewithheatsinkassembly. OneendoftheFSBisterminatedwithanI/OASIC.Theotherendofthebusisterminatedwith aCSR.AnadditionalCSRcanbeloadedinthemiddle.Forthesystemtofunctionproperly,the processorfarthestawayfromtheI/OASICmustbeloadedatalltimestoelectricallyterminate theFSB. Eachprocessormoduleplugsdirectlyintoandispoweredbyitsown12Vto1.2Vpower-pod. Otherpowerforthesystemboardcomesfrommultipleon-boardDC/DCconverters.Each processormoduleisattachedtotheboardthroughaZIFsocketandtheentireCSRsecureddown byaheatsinkbolsterplate. ProcessorBus Theprocessorbus(FrontSideBus[FSB])inthisproductrunsat200MHz.DataontheFSBare transferredatadoubledatarate,whichenablesapeakFSBbandwidthof6.4Gb/sec. ZX1I/OandMemoryController HP9000rp3410andrp3440serverssupportthefollowingfeaturesoftheZX1I/Oandmemory controllerchip: •3.3GB/speakIObandwidth •Provideseightcommunicationpaths •Peakmemorybandwidthof8.5GBs •Twomemorycells,144databitseach Memory Thememorysubsystemprovidestwomemorycells,eachofwhichis144databitswide.Each cellhassixDIMMslots,whichmeansatotalof12DIMMslotsareavailable.Thememorybus clockspeedis133MHz,andthedatatransferrateis266Mtransfers/secondasdataisclocked onbothedgesoftheclock.Thepeakdatabandwidthforthismemorysubsystemdesignis8.5 GB/s.DIMMsmustbeloadedinquadswithqualifiedmodules,withtheexceptionof256MB DIMMswhichisloadedinpairs.Memoryisprotectedbydataerrorcorrectioncode(ECC),and thehardwareimplementationsupportsthechip-sparefeature. Theminimumamountofmemorythatyoucaninstallis512MB(2x256MBmodulesinaHP 9000rp3410modelA7136Aserver),and1GB(4x256MBmodulesinotherHP9000rp34x0 servers).Themaximumamountofmemorythatyoucaninstallislimitedto24GB(12x2GB modules)or32GB(8x4GBmodules)inaHP9000rp3440server. Thisdesigndoesnotsupportanynonindustry-standardDDRDIMMs.OnlyqualifiedDIMMs aresupported. Figure1-6showsthememoryblockdiagram. DetailedServerDescription25
Figure1-6MemoryBlockDiagram MemoryArchitecture TheI/OASICmemoryinterfacesupportstwoDDRcells,eachofwhichis144databitswide. Thememorysubsystemphysicaldesignusesacomb-filterterminationschemeforboththedata andaddress/controlbuses.ThispartofthetopologyissimilartootherDDRdesignsinthe computerindustry.ClocksaredistributeddirectlyfromtheI/OASIC;eachclockpairdrivestwo DIMMs. MemorydataisprotectedbyECC.EightECCbitsperDIMMprotect64bitsofdata.Theuseof ECCenablescorrectionofsingle-biterrors,anddetectionofmulti-biterrors.OnlyDIMMswith ECCarequalifiedorsupported. DIMMs ThememorysubsystemonlysupportsDoubleDataRateSynchronousDynamicRandomAccess Memory(DDRSDRAM)technologyutilizingindustry-standardPC-1600typeDDRSDRAM DIMMs,1.2"tall.Thisiscurrentlybeingusedbyhigh-volumeproducts.TheDIMMsusea184-pin JEDECstandardconnector. DIMMsareloadedingroupsoffour,knownasarankorquad(exceptfor256MBDIMMs,which isloadedinpairs).AllfourDIMMsinarankorquadmustbethesamesize.Thefollowing informationsummarizesthememorysolutions. MemoryArrayCapacities Table1-2liststhememoryarraycapacitiesfortheserver. 26Overview
Table1-2MemoryArrayCapacities DDRSDRAMCount,TypeandTechnologySingleDIMMSizeMinimumandMaximum MemorySize 18x32MBx4DDRSDRAMs(128MB)256MBDIMM0.5GB/3GB 36x32MBx4DDRSDRAMs(128MB)512MBDIMM2GB/6GB 36x64MBx4DDRSDRAMs(256MB)1024MBDIMM4GB/12GB 36x128MBx4DDRSDRAMs(512MB)2048MBDIMM8GB/24GB 36x256MBx4DDRSDRAMs(1024MB)4096MBDIMM16GB/32GB ChipSpareFunctionality ChipspareenablesanentireDDRSDRAMchiponaDIMMtobebypassedintheeventthata multi-biterrorisdetectedontheDDRSDRAM.Inordertousethechipsparefunctionalityon theserver,onlyDIMMsbuiltwith×4DDRSDRAMpartsareused,andtheseDIMMsmustbe loadedinquads. ThememorysubsystemdesignsupportstheI/OASICchip’ssparefunctionality.Chipspare enablesanentireSDRAMchiponaDIMMtobebypassedorreplacedintheeventthatamulti-bit errorisdetectedonthatSDRAM.Inordertousethechipsparefunctionality,onlyDIMMsbuilt withx4SDRAMpartsareused,andtheseDIMMsmustbeloadedinquads(2DIMMspermemory cell,loadedinthesamelocationineachmemorycell).EachDIMMwithinaquadmustbeidentical toalltheotherDIMMsinthequad. UsingtheDIMMloadingorderfigurefromabove,chipspareisachievediffouridenticalDIMMs areloadedintheslotslabeled“1st”and“2nd.”IfmoreDIMMsareadded,theymustbeloaded inquadsinordertomaintainthechipsparefunctionality.IfmoreDIMMsareaddedtothe examplecase,fouridenticalDIMMs(identicaltoeachother,butcanbedifferentfromtheoriginal quadthatwasloaded)mustbeloadedintheslotslabeled“3rd”and“4th.” MaximummemorycapabilityoftheHP9000rp3440serveris24GBor32GB.If4GBDIMMs areused,installeightDIMMsinthefirsteightslots.Theremainingslots(9-12)mustremain emptywhen4GBDIMMsareused. SerialPresenceDetect EachDIMMcontainsanI2CEEPROMwhosecontentdescribesthemodule’scharacteristics: speed,technology,revision,vendor,andsoon.Thisfeatureiscalledserialpresencedetect(SPD). FirmwaretypicallyusesthisinformationtodetectunmatchedpairsofDIMMs,andconfigure certainmemorysubsystemparameters.TheSPDinformationforDIMMsloadedinthesystem arealsoaccessibletotheBMCthroughtheI2Cbus. I/OBusInterface TheI/Obusinterfacehasthesefeatures: •ProvidesindustrystandardPCI33MHzand66MHz,PCI-X66MHzto133MHz,32or64 databitsupport. •Uses3.3VPCIonly,anditdoesnotsupport5VPCI. •OptimizesforDMAperformance. •Supports3.3Voruniversal-keyedPCIcards.5V-keyedPCIcardsarenotsupported. ProcessorDependentHardwareController TheProcessorDependentHardware(PDH)controllerprovidesthefollowingfeatures. DetailedServerDescription27
•16-bitPDHbuswithreservedaddressspaceforthefollowing: —Flashmemory —Nonvolatilememory —ScratchRAM —Real-timeclock —UARTs —Externalregisters —Firmwareread/writableregisters —Twogeneralpurpose32-bitregisters —Semaphoreregisters —Monarchselectionregisters —Testandresetregister •ResetandINITgeneration FieldProgrammableGateArray TheFieldProgrammableGatearray(FPGA)providesACPIandLPCsupportforthePDHbus andprovidesthesefeatures: •ACPI2.0interface •LPCbusinterfacetosupportBMC •DecodinglogicforPDHdevices BMC TheBMCsupportstheindustry-standardIntelligentPlatformManagementInterface(IPMI) specification.Thisspecificationdescribesthemanagementfeaturesthathavebeenbuiltintothe systemboard.Thesefeaturesinclude:diagnostics(bothlocalandremote),consolesupport, configurationmanagement,hardwaremanagementandtroubleshooting. TheBMCprovidesthefollowing: •CompliancewithIPMI1.0 •Tachometerinputsforfanspeedmonitoring •Pulsewidthmodulatoroutputsforfanspeedcontrol •Push-buttoninputsforfrontpanelbuttonsandswitches •Oneserialport,multiplexedwiththesystemconsoleport •Remoteaccessandintelligentchassismanagementbus(ICMB)support •ThreeI2Cmaster/slaveports(oneoftheportsisusedforintelligentplatformmanagement bus(IPMB) •LowPinCount(LPC)busprovidesaccesstothreeKeyboardControllerStyle(KCS)and one-BlockTransfer(BT)interface •32-bitARM7RISCprocessor •160-pinLowProfileFlatPack(LQFP)package •Firmwareisprovidedforthefollowinginterfaces: —IPMI —IPMB SCSIController TheSCSIcontrollerisaLSILogic53C1030chip.ThischipisfullycompliantwiththeSCSI PeripheralInterface-4Specification(SPI-4).IthastwoindependentSCSIchannelssupporting devicesatspeedsupto320MB/secondseach.The53C1030adherestothePCI-Xaddendum,to thePCILocalSpecification,andishard-wiredtoPCIID1whichcorrespondstobit17ofthePCI ADbus. 28Overview
IDEInterface TheIDEcontroller(PCI649)supportstheATAPIzero(0)tofive(5)modes(from16to100MB/s). Theusablespeedonthissystemislimitedto16MHz(ATA-33mode,33MB/s)becausethe slimlineCD/DVDdevicesdonotsupporttheATA-66and100modes. TheprimaryIDEchannelistheonlychannelthatisimplemented.TheIDEcableprovidesonly onedriveconnector,ofthemastertype,fortheopticalstorageperipheral. 1GBSystemLAN The1GBSystemLANportprovides: •MainsystemLAN •10/100/1000MBcapable USBConnectors TheUSBconnectorsprovide: •Highspeed480MB/secondscapable •Fullspeed12MB/secondsandlowspeed1.5MB/seconds •SupportforUSBkeyboardandmouse •HP-UXsupportsHPUSBkeyboardandmouse DiskandI/OPathLogging SomefailuresresultinI/Opathlogging.Thesepathshelptoindicatethesourceoftheerrorand canbeincludedintheerrormessageorloggedintoconsoleoreventlogs. Table1-3describesthediskdriveandDVDpathsfortheserver. Table1-3InternalDiskandDVDPaths ACPIPathLocationFunctionAssociatedwithPathSlot 0/1/1/0.0.0BottomdiskslotUltra3SCSII/OforbottomremovablediskDiskslot0 0/1/1/0.1.0MiddlediskslotUltra3SCSII/OformiddleremovablediskDiskslot1 0/1/1/1.2.0TopdiskslotUltra3SCSII/OfortopremovablediskDiskslot2 0/0/2/0.0.0DVDslotIDEI/OforDVDDVDslot Table1-4describestheextendedcoreI/Opathsfortheserver. Table1-4ExtendedCoreI/OPaths ACPIPathLocationFunctionAssociatedwithPathSlot 0/0/1/0Rearpanel(with mousesymbol) USBportCoreI/O Rearpanel(top/white connector) 0/0/1/0USBportCoreI/O 0/0/1/1Rearpanel(with keyboardsymbol) USBportCoreI/O 0/0/1/1Rearpanel (bottom/white connector) USBportCoreI/O 0/0/1/2InternalUSBportCoreI/O 0/0/2/0SystemboardIDEcontrollerCoreI/O DetailedServerDescription29
Table1-4ExtendedCoreI/OPaths(continued) ACPIPathLocationFunctionAssociatedwithPathSlot 0/0/3/0Rearpanel(withLAN 10/100label) LAN100portCoreI/O 0/1/1/0SystemboardUltra3SCSIChannelACoreI/O 0/1/1/1SystemboardUltra3SCSIChannelBCoreI/O 0/1/1/1.x.yRearpanel(withSCSI LVD/SElabel) Ultra3SCSII/O—externalSCSICoreI/O 0/1/2/0Rearpanel(withLAN GVlabel) LAN1000portCoreI/O 0/7/1/1Rearpanel(accessible thruWcable) Interfacewithexternalconsole(ECI)Consoleport 0/7/1/0Rearpanel(accessible thruWcable) InterfacewithUPS(ECI)Remoteport N/ARearpanel(accessible thruWcable) InterfacewithUPSUPSport 0/7/2/0Rearpanel(withVGA label) Notused(disabled)ECI(VGA port) FactoryuseonlyRearpanel(withSerial Alabel) Baseboardconsoleport(CLI)N/A FactoryuseonlyRearpanel(withSerial Blabel) BaseboardserialportN/A Table1-5describesthePCII/Opathsfortheserver. Table1-5PCII/OPaths ACPIPathLocationFunctionAssociatedwithPathSlot 0/4/1/0Topconnector/slotin PCIcardcage 64-bit,133MHzPCI-XcardSlot1 0/3/1/0Secondconnector/slot inPCIcardcage 64-bit,133MHzPCI-XcardSlot2 0/2/1/0Thirdconnector/slotin PCIcardcage 64-bit,133MHzPCI-Xcard(activerp3440only)Slot3 0/6/1/0Bottomconnectorof PCIcardcage 64-bit,133MHzPCI-Xcard(activerp3440only)Slot4 Table1-6PCII/OHardwarePaths HP-UXPathMAPPERPathPCICardFunctionality 0/0/1/00/0/1/0USBPort 0/0/1/00/0/1/0USBPort 0/0/1/10/0/1/1USBPort 0/0/1/10/0/1/1USBPort 0/0/2/00/0/2/0IDEController 0/0/2/0.0.00/0/2/0.0.0DVDDrive 0/1/1/0.0.00/1/1/0.0.0InternalSCSI-Slot0 0/1/1/0.1.00/1/1/0.1.0InternalSCSI-Slot1 30Overview