GTE Omni Si Database Technical Practices Issue 1 Manual

							TR-100119-1
PMS interface CardPMIPPTR
FB-17280-A
PRLT
FB-17251 -A
SVR 5210TL-130500-1001
3.6.14 The Property Management System Interface card
connects the system to the PMS. This card communicates with
the PMS using its PMS port and with the 
OMNI PABX using its
KEDU port on the SIDML card, FB-17209-A. The PMI card
provides for an interface to the system hotel printer via its printer
port and the SIDML card. The PMI card fits into any universal
card slot and its external connections are made to the CDF via
outrigger cable adapters.
3.6.15 The PCM Progress Tone 
Recognizer card is optional for
stations that are allowed to access the MERS (Most Economical
Route Selection) SCC (Special Common Carrier) option. The
PPTR card eliminates the requirement for a programmed pause
when accessing the SCC. Although this card is optional, it is
recommended for the SCC access through the MERS option to
prevent long delays in accessing the SCC.
3.6.16 The PCM Release Link Trunk card is required in the
branch system for CAS Main system applications. The card
supports four 
(RLTs) Release Link Trunks. A PRLT is used as a
momentary access between the CAS Branch system and the
CAS Main system. After a CAS Main attendant extends a line or
trunk, the PRLT is dropped, making the particular PRLT circuit on
this card available for use again.
The RLT circuit basically makes a system trunk look like a CO
loop trunk. It provides a 
- 48 VDC battery output for loop
operation, and also provides signaling, dial tone, etc. 
RLTs also
allow an operator at the CAS Main location to direct calls within a
branch system that require operator assistance. Primarily these
calls are incoming CO trunk calls but can also be timed recalls,
transfers, dial 0, etc., all of which provide the appearance of 
a.staffed branch system.
RLTs may also be implemented in the system serving as the
CAS Main system if centralized service features are to be
provided as well.
Using a standard two-wire loop facility, each RLT circuit from
the branch is connected to a two-way loop trunk circuit at the
CAS Main location where data base programming establishes
the CAS control capabilities.
8187S-63 
						

							TL-130500-1001S1DMLFB-17209-A3.6.17 The SI Dual Modem and Current Loop card has two
circuits and is required for the system to interface with the
following:
l Agent Instrument
l Printer
l KEDU (Key Entry Display Unit)
NOTE: A Line Interface card circuit is also required to interface
with an Agent Instrument. One or two line interface circuits are
used for each Agent Instrument, and two circuits are always
required for the supervisor’s Agent Instrument.
The 
SIDML card connects the Agent Instrument to the digital data
link that connects through the 
MPB85 card to the PEC CPU. The
transfer of digital data between this card and an Agent Instrument
is performed in a full-duplex, 
1.200-baud, serial, current loop
mode. The transfer of data between this card and the MPB85
card is in parallel by eight-bit format under control of the CPU.
VCIPFB-17235-A3.6.18 The Voice Control Interface Processor card is required
for the system to interface with a voice-only Digital
Featurephone. This card supports interfacing to eight Digital
Featurephones via individual twisted pair wiring. 
VCIP to Digital
Featurephone communications is via a digital data link; system to
VCIP communications is done by memory mapping, using the
MPB85 card. The transfer of digital data between this card and a
Digital Featurephone is performed in duplex, using 
MPRTs(Mini-Packet Receiver/Transmitters). The transfer of data
between this card and the MPB85 card is in parallel by eight-bit
format under control of the CPU.
The card contains a 6502 microprocessor with 40K bytes of RAM
and 15K bytes of ROM.
S-648/:87SVR 5270 
						

							TL-130500-1001Power File3.7 This paragraph contains descriptive information about PCBs
Printed Circuitinstalled within the Power File (Figure 3.10). Table 3.5 lists the
Boardspower cards and the dedicated card slots.
Table 3.5 Power Cards
Card Number Mnemonic and Name
FB-17197-A, PSUPY, Power Supervisory CardCard Slot
c/o1 1
FB-51051 -A, PTF, Power Fail Transfer1 
c/o41  FB-17204-A, 
BC5R, Battery Charger 5-Volt Regulator1 C/O6 /
FB-20996-A, RABR, Recorder Announcer 
Buildout Resistor
(Rear Mount)Cl08
08
1Figure 3.10 PSUPY Card
PSUPY3.7.1 The Power Supervisory card monitors the power supply
FB-17197-Aoutputs from both the Get Started and the Expansion Files. The
card provides the following:
l 
LEDs (light emitting diodes) that indicate
- fuse alarms
- ringing voltage alarms
- initialization status
- status of + 5 VDC, + /-12 VDC, and -48 VDC potentials for
both files
l Housing for
- CPU85E RESET button for memory loading routine
preparation
- Type 200 Test Set enable/disable TOGGLE switch
SVR 5210
8187S-65 
						

							TL-130500-1001
PFT
FB-51051 -ABCSRFB-17204-A
RABR
FB-20996-A3.7.2 The Power Fail Transfer card is required when provisions
for power failure trunks are required. This card connects up to
seven dedicated line/trunk circuits directly to the DDD network on
power outages.
During normal operation, the switch on the front panel of the PFT
card should be in the upward or horizontal position. Setting the
switch in the downward position results in a forced transfer of the
seven trunks on the corresponding relays on the PFT card. This
causes LED-l, located on the card, to light. This forced
transfer is only used for testing purposes.
3.7.3 The Battery Charger &Volt Regulator card provides + 5
volt DC to the Ml MB card. Under normal operating conditions
(when AC power is present), it charges the 5 volt back-up
batteries. When power faiis, this card will provide + 5 volt DC
from the back-up battery pack to the 
MPGl6, Ml MB. and the
CP85E. This action maintains the system memory and the
CP85E wake-up clock.
3.7.4 The Recorder Announcer 
Buildout Resistor is required
for a music-on-hold or recorder announcer connection.
Located on the rear of the power file backplane in slot 8, it
provides tip and ring resistors 
:o the lines connected to the
recorder announcer. This prevents system users who are
attached to the announcer from talking to each other.
The card also contains resistors and capacitor circuitry for
connecting music-on-hold.
S-66
8187SVR 5210 
						

							TL-130500-1001
SYSTEM HARDWARE4.0 This section describes the OMNI SI system hardware.
Common Control4.1 The system uses an INTEL 8085 microprocessor as
Hardwarethe master system control device. The INTEL 8085 and other
associated circuitry are mounted on a PCB called the CPU
(Central Processor Unit) FR 17288-A, Figure 4.1.
__-__TO CHM
Tl SYNC
TAB CONNECTIONS
FOR CARDS SHOWN
16 ADDRESS LEADS AND 8 DATA OUT LEADS
Figure 4.1 CPU Connections
SVR 5210The CPU has 16 parallel leads known collectively as the
ADDRESS bus, which are used for addressing memory locations
and PCB (Input/Output) locations. Since the Intel 8085 is an
eight-bit microprocessor, the CPU DATA IN and DATA OUT
buses that communicate with the memory and 
l/O consist of eight
parallel leads each. The CPU, via the ADDRESS bus, can
identify any memory storage location (eight-bit word) and
instruct the memory to load the contents of that location into the
CPU DATA IN bus so the CPU can read the data and respond to
it accordingly. The CPU also generates new information that
must be stored and uses the ADDRESS bus to instruct the
memory where to store the information being received from the
CPU DATA OUT bus.
8187S-67 
						

							TL-130500-1001
In addition, there are also status and control signal leads, and
priority interrupt leads complementing the CPU.
The system is equipped with an Ml MB memory card. The 1 MEG
memory is divided into Instruction Pages and Data Pages O-7.
The MPG16 paging card, under software control, determines
which page should be active and sets it accordingly.
The CPU also uses the adddress and data buses to
communicate with other 
PCBs. The CPU connects to the MPB85
card to perform common control functions (such as PCM
Universal Slot (PCMUS) circuit sense and control functions), and
it connects to the 
CHM85 card to control the time-switch
network. The CPU connects to all of the common control cards
except the Pulse Code Modulation Tone Source (PCMTS) card
and 
INCKS card associated with the time-switch network.
The CPU has priority interrupt leads, which are used by some
cards to gain access to the CPU when required. For instance,
the Narrow Serial Device Controller (NSDC) card is more
efficiently serviced on a priority interrupt basis. The priorities are
arranged so that the CPU attends to the most urgent requests
first.
Peripheral4.2 The OMNI SI system has 40 PCMUSs (PCM Universal Slots)
Equipmentwhich provide connectorized cable access to the outside world.
InterfaceThere is an extra PCMUS (AO) available for circuits not requiring
external connections (PDTMF or PCONF).One MPB85 card
controls the Get Started File, while a second MPB85 card
controls the Expansion File. Both 
MPB85s are directly
connected to the CPU address, data out, and data in buses.
Only one MPB85 will be considered in this discussion.
Common buses connect the MPB85 card to all of the PCMUSs in
each group, and to the 
Tl card slots (in the Expansion File only).
These are the read or sense bus (8 leads), the write or control
bus (8 leads), the circuit address bus (2 leads), and a read lead
and a write lead. The MPB85 card can control individual PCMUS
positions because of a separate select lead connection to each
PCMUS in the file (Figures 4.2 and 4.3). The MPB85 card can
select a circuit address 
(O-3), enable the read lead and then
use one PCMUS select lead to initiate a read command to the
PCB installed in that PCMUS. Any data appearing on the
read/sense bus leads will be from that PCMUS circuit card. The
two address leads allow four different circuits to be mixed on
each PCMUS circuit card.
8/87SVR 5210 
						

							TL-130500-1001-1PIN NUMBERS
LSB 0 
----f 6567
1-15172 
- 64683 
- 14184 
- 7580
5 
- 3130
6 
- 8482
MSB 7 
- 3432
READ 
-29WRITE 
j, 79ADDRESS A 
+ 33
ADDRESS B 
-83CARDSELECT 
-28
‘igure4.2Control andSensingConnections 1
Universal SlotSEPARATE SELECT LEAD TO EACH UCS
/CONTROL BUS, READ/WRITE
CONTROL, AND ADDRESS BUSMPB85
GET
STARTED
FILEDATA IN BUS----,t-- TY$Yj
J
aJB CHTiB5ADDRESS ANDCARD
DATA OUT BUS
COMMONCONTROL
l;
Figure 4.3Common Control Related Circuits
SW 52108187S-69 
						

							TL-130500-I 001
For example, a loop trunk circuit card has four identical circuits.
The MPB85 card addresses each individually. When one of the
trunk circuits detects an incoming seizure (ringing), it changes
the status of a gate (lead 6) on its sense bus. When the MPB85
card requests a read of that circuit, the sense/read bus (lead 6)
reflects this change of status. The MPB85 card accepts this
information as a change in status of sense bit 6 of an 8-bit
digital word, passes this information on to the CPU, which
compares it to the previous sense word received from that trunk
circuit. When the CPU receives a second sense word confirming
the incoming seizure from this trunk circuit, it sends the request-for-service event message which alerts the time-switch
network to prepare for another conversation (assign a time slot).
When a PCMUS contains a line circuit card, the address select
function is not required. Since only on-hook/off-hook sense
information is required, one sense/read word representes all
eight circuits, .
Time -Switch4.3 The time-switch network of the system establishes the
Networkconnection between stations and passes data between them.
The time-switch network uses five memories and a 
one-to-one correspondence between memory locations (called a time
slot) Figure 4.4.
CHANNELCONTROLCONTROL
PADINFORMATIONMEMORYMEMORY -MEMORY -MEMORYMEMORY
ABAAAAA
TIMESLOT
NO.2R-------
1
D
D
REsS------
408R.------
1
D
D
R
E
ss------
A10
A.------
1
DD
R
E
sS_------Cl0
THE 1 
-TO-l CORRESPONDENCE BETWEEN THE MEMORY
LOCATIONS IS CALLED A TIME SLOT
I 
IFigure 4.4 Time-Switch Network
8187SVR 5210 
						

							TL-130500-1001Call Processing4.3.1 A basic call, which uses information memory, channel
memory, and control memory (A), is processed as follows:
1. The system scans every line for an off-hook condition, and
finding one (assume phone number 
83) reports it to the CPU.
2. The system writes the location number of that phone into an
unused location in the channel memory (time slot); assume
time slot number 3 (Figure 4.5). At the same time, the system
also reserves time slot number 3 in control memory.
3. The system collects the digits dialed and determines who is
being called (assume phone number 55)
a. Time slot number 1 is assigned to phone number 55, and
b. Time slot number 1 is reserved in control memory.
c. Connection is completed by writing the time slot number of
the other phone into the two reserved locations in the control
memory (Figure 4.5).
NOTE: The memories involved are channel memory, control
memories A and B, and pad memory.
___-1
TIME SLOT
NUMBER
CHANNEL
CONTROL
MEMORY
MEMORYTIME SLOT
NUMBER
CHANNEL
MEMORY
SVR 521083
3RESERVED
~ II4
Figure 4.5Time-Switch Memory Se
NOTE: For further definition of time slots, see section 10.0 of this
document.
8187s-71 
						

							TL-130500-1001Call Processing4.3.2 Data is passed between the connected users (stations 83
Data Transferand 55) in the following manner:
1. The network scans through each time slot in the information
memory.
2. For every time slot that has a written phone location, the
network goes to that location, gets a data sample, and writes
the sample into the same time slot in the information memory
3. The network, after doing the data collection for phone 83, looks
in the same time slot in the control memory where the time slot
number is for the other phone that phone 83 is talking to.
4. The network goes to that time slot in the information memory to
get the data previously taken from the other phone 
(55), which
is then sent to phone 83.
To summarize the data transfer: phone 83 is in time slot 3, and
time slot 3 in control memory contains a 1. Therefore, a data
sample should be taken from time slot 1 information memory and
sent to phone 83. Similarly, phone 55 is in time slot 
1, and time
slot 1 in control memory contains a 3; therefore, a data sample
should be taken from time slot 3 information memory and sent to
phone 55.
NOTE: The previous discussion used a “black box” approach in
which memory was accessed by time slot numbers; however, the
actual system accesses memory by memory address. The
memory addresses contain the information that directs the
connection established by the time-switch network. All of these
memories are interrelated with a time slot/channel number. A
complete memory cross-reference is shown in Tables 4.1 and
4.2.s-72
8187SVR 5210