GE Logiq 9 Service Manual
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GE MEDICAL SYSTEMS PROPRIETARY TO GE D IRECTION 2294854-100, REVISION 3 LOGIQ™ 9 PROPRIETARYMANUAL Chapter 7 Diagnostics/Troubleshooting 7-23 7-7-4-1Board-Level SCB Diagnostics (cont’d) •SCB PCI Interface Diag: Tests the Host’s ability to communicate with the SCB via the secondary PCI bus. NOTE: A preferred test strategy for the PCI 9054 Interface is detailed in Section 7-8. •SCB Memory Diag: Tests all of the on-board memory, including registers. Some on-board RAM requires other functionality (DSP RAM, RxSync RAM). These memories will be tested in their respective function-related diagnostics. •SCB DSP Diag: Tests the following: - The Hosts communication to the DSP via the Comm Ports. -DSP Memory. - DSP Processor (Self-Test). - DSP Interrupts. -DSP LEDs. •SCB Scan Bus Diag: Tests the RxSync RAM, and the local on-board Scan Bus. Also, the System Timing blocks utilization of the Scan Bus to generate proper TxSync and RxSync pulses is verified in non-CW mode. NOTE: The backplane Scan Bus is tested at the system level. •SCB Image Port Diag: Tests the following Image Port functionality: - The Data and Control Fifos (control lines and data lines). - The various components (registers, state machines, i960) and signal lines that transfer data from the Data FIFOs to the Image Memory. - The LOGIQ™ 9-to-Pipelink formatting and transfer to Image Memory, including Scan Bus decoding, Image Port state machines, i960, etc. - The i960/Video Decoder communication. - DMA transfer from the Image Memory to the host. This diagnostic does not test the SCBs ability to capture I/Q data from the EQ, nor B/M data from the BMP. These functions are tested at the system level. NOTE: In R3.x software the following error may or may not occur: “Failed SCB DSP Interrupt Test, TxSynce High Time = 00000000”. This test is located under the SCB Diagnostics. A 10% failure rate is considered acceptable. You may need to run this test multiple times before considering it a true SCB failure.
GE MEDICAL SYSTEMSPROPRIETARY TO GE D IRECTION 2294854-100, REVISION 3 LOGIQ™ 9 PROPRIETARYMANUAL 7-24 Section 7-7 - Acquisition Diagnostics 7-7-4-2 Board-Level BMP Diagnostics •All Board-Level BMP Diags: Tests vector generation and Scan Bus emulation on the BMP. This configuration further tests the SCBs Clock Generation and PCI bridge, but does not rely on the Scan Sequencer or Image Port functions of the SCB. Not tested on the BMP, with this diagnostic, are its abilities to receive and correctly process the TxSync, RxSync, IQ data, and Scan Bus inputs, as well as its ability to drive the BM output data to the SCB. These functions will be tested with a system-level diagnostic. The following subsections outline the Board-Level BMP Diagnostics. •BMP PCI Interface Diag: Tests the Host’s ability to communicate with the BMP via the PCI bus. NOTE: A preferred test strategy for the PCI 9054 Interface is detailed in Section 7-8. •BMP Memory Diag: Tests all of the on-board memory, including registers. NOTE: Guidelines in Section 7-9 will enumerate the memory locations. •BMP Signal Path Diag: Tests the entire BMP signal path with a series of input vectors and scan parameters (both from the on-board test vector generator), whose results are each read out of a FIFO in the BM Output section of the board. The following BMP functions are tested: - Synthetic Aperture - Dynamic Range Compression - Axial Interpolator - Edge Enhance -Detector -Splicer - Vector Compounder - BM Output, with exception of the output signal drivers - Rate Converter - Memory Banking The BM data read from the Output blocks FIFO may then be compared to gold file data for verification and fault isolation.Figure 7-22 Board-Level BMP Block Diagram XDIF/RFTD’sEQBMP Scan Control BoardHostPCI PCI PCI IQ, RxSYNCBM IQ IIC RFProbeRF TD CTRLTxSYNC RxSYNC TxSYNCTxSYNC
GE MEDICAL SYSTEMS PROPRIETARY TO GE D IRECTION 2294854-100, REVISION 3 LOGIQ™ 9 PROPRIETARYMANUAL Chapter 7 Diagnostics/Troubleshooting 7-25 7-7-4-3 Board-Level EQ Diagnostics •All Board-Level EQ Diags: More of the SCB is utilized. Specifically, this diagnostic tests the following SCB functions: - PCI Bridge - Clock generation - Scan Bus generation - TxSync generation - RxSync generation - Image Port In terms of EQ functionality, what are not tested with this configuration, are any abilities to communicate with the TDs, XDIF, or RF Amplifier boards. These functions will be tested in other diagnostics. The following subsections outline the Board-Level EQ Diagnostics. •EQ PCI Interface Diag: Tests the PCI Interface. NOTE: A preferred test strategy for the PCI 9054 Interface is detailed in Section 7-8. •EQ Memory Diag: Tests all of the on-board memory, including registers. NOTE: Guidelines in Section 7-9 will enumerate the memory locations. Figure 7-23 Board-Level EQ Block Diagram XDIF/RFTD’sEQBMP Scan Control BoardHostPCI PCI PCI IQ, RxSYNCBM IQ IIC RFProbeRF TD CTRLTxSYNC RxSYNC TxSYNCTxSYNC
GE MEDICAL SYSTEMSPROPRIETARY TO GE D IRECTION 2294854-100, REVISION 3 LOGIQ™ 9 PROPRIETARYMANUAL 7-26 Section 7-7 - Acquisition Diagnostics 7-7-4-3Board-Level EQ Diagnostics (cont’d) •EQ Signal Path Diag: Tests the entire EQ data path, in all its modes and available options. This diagnostic will utilize the TGC RAM in conjunction with a constant value loaded into the Input Barrel Shifter. Scans will then be run, under the control of the SCB. In this way, the TGC section of the board can both be tested and also made to form test vectors for the rest of the signal chain. Specifically, the following functions are tested: - TGC generation and analog/digital apportioning - Scan Bus Interface - Output Drivers - Signal Chain, including: * Input Barrel Shifter and Multiplier (digital TGC) * NCOM and FIR (TFC) * Output Barrel Shifter Processed IQ data out of the EQ and input to the SCB may then be read from the Image Ports Ring Buffer and compared to gold file data for verification and fault isolation. 7-7-4-4 Board Level EBM Diagnostics BT’02 Systems and higher contain the EBM Board than combines the functions of the previous EQ4 and BMP4 boards. The BMP diagnostics previously mentioned will test the BMP portion of the EBM board and the EQ diagnostics will check the EQ portion of the EBM board.Figure 7-24 Example: EQ Board PCI Test Passed
GE MEDICAL SYSTEMS PROPRIETARY TO GE D IRECTION 2294854-100, REVISION 3 LOGIQ™ 9 PROPRIETARYMANUAL Chapter 7 Diagnostics/Troubleshooting 7-27 7-7-4-5 Board-Level TD Diagnostics •All Board-Level TD Diags: This configuration, again, tests the SCBs Clock Generation and PCI Bridge. Additionally, the TD access functionality is more fully tested, building on the SCBs board- level tests. The following subsections outline the Board-Level TD Diagnostics. •TD Memory Diag: This diagnostic shall test all of the on-board memory, for all installed TD boards, including registers. NOTE: Guidelines in Section 7-9 will enumerate the memory locations. •TD Access Diag: Tests all of the Access Modes utilized for Host/TD communication, as well as Channel RAM to Rigel transfers. This diagnostic includes single-location accesses, single-board broadcasts, and multiple-board broadcasts. The diagnostic will adjust its parameters depending upon how many TD boards are installed in the system. 7-7-4-6 Board-Level XDIF Diagnostics •All Board-Level XDIF Diags: Targets the XDIF. The system setup required for this Diagnostic Group is shown in Figure 7-26. • This Diagnostic Group consists of a single diagnostic, outlined in the following subsection. •XDIF Interface Diag: Tests the non-probe generated communication between the EQ and the XDIF. This diagnostic shall test all of the XDIF functionality that is testable without a probe or probe simulator attached to the system, including the IIC communication.Figure 7-25 Board-Level TD Block Diagram Figure 7-26 Board-Level XDIF Block Diagram XDIF/RFTD’sEQBMP Scan Control BoardHostPCI PCI PCI IQ, RxSYNCBM IQ IIC RFProbeRF TD CTRLTxSYNC RxSYNC TxSYNCTxSYNC XDIF/RFTD’sEQBMP Scan Control BoardHostPCI PCI PCI IQ, RxSYNCBM IQ IICRFProbeRF TD CTRLTxSYNC RxSYNC TxSYNCTxSYNC
GE MEDICAL SYSTEMSPROPRIETARY TO GE D IRECTION 2294854-100, REVISION 3 LOGIQ™ 9 PROPRIETARYMANUAL 7-28 Section 7-7 - Acquisition Diagnostics 7-7-4-7 System-Level Digital Diagnostics •All System-Level Digital Diags: Targets system communications and digital system functions (those functions which rely on multiple boards for performance, but do not target analog circuitry). •TD Access Diag: Tests all of the Access Modes utilized for Host/TD communication, as well as Channel RAM to Rigel transfers. This diagnostic includes single-location accesses, single-board broadcasts, and multiple-board broadcasts. The diagnostic will adjust its parameters depending upon how many TD boards are installed in the system. •Comprehensive Signal Path Diag: Tests the signal path of every channel from the TD Rigel Transmit Memories to the SCB, via both the EQ and BMP. This Diagnostic puts the entire digital signal processing path together for the most comprehensive digital data path test available to the system. The system setup for this Diagnostic is shown in Figure 7-27. This diagnostic tests the following functions: - TD signal paths. - TD - EQ data communication. - EQ - BMP data communication. - EQ - SCB data communication. - BMP - SCB data communication. - SCBs ability to simultaneously receive and process I/Q and BM data. This diagnostic will need to verify each receive channel by itself, and also all receive channels at once (to test the summing and the upper bits of the data path).Figure 7-27 System-Level TD-EQ-BMP-SCB Block Diagram XDIF/RFTD’sEQBMP Scan Control BoardHostPCI PCI PCI IQ, RxSYNCBM IQ IICRFProbeRF TD CTRLTxSYNC RxSYNC TxSYNCTxSYNC
GE MEDICAL SYSTEMS PROPRIETARY TO GE D IRECTION 2294854-100, REVISION 3 LOGIQ™ 9 PROPRIETARYMANUAL Chapter 7 Diagnostics/Troubleshooting 7-29 7-7-4-8 System-Level Analog Diagnostics •All System-Level Analog Diags: These tests may involve the entire system or, in some cases, only a few circuit boards. Diagnostics which may utilize the entire system are those which test various analog aspects of the system, such as noise floor tests, loopback tests, etc. Diagnostics which may only utilize a few circuit boards are those which test various miscellaneous functions, such as Analog TGC generation on the RF Amplifier board. These tests should be performed last in the confidence-building scheme. However, the order in which they are performed, relative to each other is not important. •TD Analog Reference Diag: Tests the generation of the two reference voltages required on each TD board (AD_REF and VREF), and the IIC bus communication to the TD boards through the EQ. AD_REF is simply the output of an analog reference device on each TD, while VREF is generated on each board based on a digital value output from the EQ (this also tests some EQ functionality missed in its board-level diagnostic). Each is measured using an IIC-connected A/D converter on the TD. The system setup required for this test is shown in Figure 7-28. •Analog TGC Diag: Tests the generation of the analog TGC voltage. The analog TGC and IIC bus communication to the RF Amplifier board, through the EQ is tested. The RF Amplifier functionality tested includes: - Analog TGC digital communication with EQ (this also tests some EQ functionality missed in its board-level diagnostic) and analog TGC Gain Reference generation, through the DAC - RF Amplifier on-board IIC functionality The system setup required for this test is shown in Figure 7-29.Figure 7-28 System-Level TD Analog Reference Block Diagram Figure 7-29 Analog TGC System Setup Block Diagram XDIF/RFTD’sEQBMP Scan Control BoardHostPCI PCI PCI IQ, RxSYNCBM IQ IICRFProbeRF TD CTRLTxSYNC RxSYNC TxSYNCTxSYNC VREF XDIF/RFTD sEQBMP Scan Control BoardHostPCI PCI PCI IQ, RxSYNCBM IQ IICRFProbeRF TD CTRLTxSYNC RxSYNC TxSYNCTxSYNC TGC
GE MEDICAL SYSTEMSPROPRIETARY TO GE D IRECTION 2294854-100, REVISION 3 LOGIQ™ 9 PROPRIETARYMANUAL 7-30 Section 7-7 - Acquisition Diagnostics 7-7-4-8System-Level Analog Diagnostics (cont’d) •Power Supply Diag: Tests the System voltages available on the EQ. This diagnostic tests the following: - Power supply voltage rail generation. - Voltage rail loading by installed circuit boards (insomuch as there are no faults on these) - Pulser HV Level Select functionality, base on the Scan Bus tag - IIC functionality on the EQ. The systems voltage rails are read from IIC-connected A/D converters on the EQ. The system setup required for this test is shown in Figure 7-30. •Temperature Diag: Tests the temperature of the system, wherever available. This test will utilize the temperature sensing ability built into the IIC-connected A/D converters on the TD, RF Amplifier, and EQ. These are the same A/D converters utilized in the Analog Reference Diagnostic, Power Supply Diagnostic, and Analog TGC Diagnostic. Also, the probe temperature sensing ability is tested. The system setup required for this test is shown in Figure 7-31. •Noise Floor Diag: Measures the noise floor of the System. The entire system is required for this diagnostic. The noise floor will be calculated from IQ data received without a signal source.Figure 7-30 Power Supply System Setup Block Diagram Figure 7-31 Probe Temperature Monitoring System Setup Block Diagram XDIF/RFTD’sEQBMP Scan Control BoardHostPCI PCI PCI IQ, RxSYNCBM IQ IICRFProbeRF TD CTRLTxSYNC RxSYNC TxSYNCTxSYNC XDIF/RFTD sEQBMP Scan Control BoardHostPCI PCI PCI IQ, RxSYNCBM IQ IICRF ProbeRF TD CTRLTxSYNC RxSYNC TxSYNCTxSYNC
GE MEDICAL SYSTEMS PROPRIETARY TO GE D IRECTION 2294854-100, REVISION 3 LOGIQ™ 9 PROPRIETARYMANUAL Chapter 7 Diagnostics/Troubleshooting 7-31 7-7-4-8System-Level Analog Diagnostics (cont’d) •Loopback Diag: Tests the analog front end of the System. This test utilizes the transmitter of one or more channels to generate a looped-back analog input signal for the receiver of each channel. The entire system is required for this diagnostic. With this setup (given a known-good digital signal path), analog front end component failures can be isolated.Figure 7-32 Example: Running Loopback Tests Figure 7-33 Example: Loopback Test Failure
GE MEDICAL SYSTEMSPROPRIETARY TO GE D IRECTION 2294854-100, REVISION 3 LOGIQ™ 9 PROPRIETARYMANUAL 7-32 Section 7-7 - Acquisition Diagnostics 7-7-4-8System-Level Analog Diagnostics (cont’d) Figure 7-34 Example: Loopback Troubleshooting Hints Figure 7-35 Example Loopback Test with Probe Attached