Samsung Exynos 5 User Manual

							 
      
 
Samsung Exynos 5 Dual 
(Exynos 5250) 
RISC Microprocessor 
 
Revision 1.00 
October 2012 
UUsseerrss  MMaannuuaall  
  2012  Samsung Electronics Co., Ltd. All rights reserved.   
						

							 
      
Important Notice 
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Typicals must be validated for each customer application 
by the customers technical experts.  
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警 告  本文件仅向经韩国三星电子株式会社授权的人员提供，
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Copyright  2012 Samsung Electronics Co., Ltd. 
Samsung Electronics Co., Ltd. 
San #24 Nongseo-Dong, Giheung-Gu 
Yongin-City, Gyeonggi-Do, Korea 446-711 
Contact Us: [email protected] 
 
Home Page: http://www.samsungsemi.com  
						

							 
      
Trademarks 
All brand names, trademarks and registered trademarks belong to their respective owners.  
 Exynos, Exynos 5250, FlexOneNAND, and OneNAND are trademarks of Samsung Electronics. 
 ARM, Jazelle, TrustZone, and Thumb are registered trademarks of ARM Limited.  
 Cortex, ETM, ETB, Coresight, ISA, and Neon are trademarks of ARM Limited. 
 Java is a trademark of Sun Microsystems, Inc. 
 SD is a registered trademark of Toshiba Corporation. 
 MMC and eMMC are trademarks of MultiMediaCard Association. 
 JTAG is a registered trademark of JTAG Technologies, Inc. 
 Synopsys is a registered trademark of Synopsys, Inc. 
 I2S is a trademark of Phillips Electronics. 
 I2C is a trademark of Phillips Semiconductor Corp. 
 MIPI and Slimbus are registered trademarks of the Mobile Industry Processor Interface (MIPI) Alliance. 
All other trademarks used in this publication are the property of their respective owners. 
 
  
						

							 
      
Chip Handling Guide 
Precaution against Electrostatic Discharge 
When using semiconductor devices, ensure that the environment is protected against static electricity:  
1. Wear antistatic clothes and use earth band.  
2. All objects that are in direct contact with devices must be made up of materials that do not produce static 
electricity.  
3. Ensure that the equipment and work table are earthed.  
4. Use ionizer to remove electron charge. 
Contamination  
Do not use semiconductor products in an environment exposed to dust or dirt adhesion.  
Temperature/Humidity 
Semiconductor devices are sensitive to:  
 Environment  
 Temperature  
 Humidity  
High temperature or humidity deteriorates the characteristics of semiconductor devices. Therefore, do not store or 
use semiconductor devices in such conditions. 
Mechanical Shock 
Do not to apply excessive mechanical shock or force on semiconductor devices.  
Chemical 
Do not expose semiconductor devices to chemicals because exposure to chemicals leads to reactions that 
deteriorate the characteristics of the devices. 
Light Protection 
In non- Epoxy Molding Compound (EMC) package, do not expose semiconductor IC to bright light. Exposure to 
bright light causes malfunctioning of the devices. However, a few special products that utilize light or with security 
functions are exempted from this guide. 
Radioactive, Cosmic and X-ray 
Radioactive substances, cosmic ray, or X-ray may influence semiconductor devices. These substances or rays 
may cause a soft error during a device operation. Therefore, ensure to shield the semiconductor devices under 
environment that may be exposed to radioactive substances, cosmic ray, or X-ray.  
EMS (Electromagnetic Susceptibility) 
Strong electromagnetic wave or magnetic field may affect the characteristic of semiconductor devices during the 
operation under insufficient PCB circuit design for Electromagnetic Susceptibility (EMS).  
						

							 
      
Revision History 
Revision No. Date Description Author(s) 
1.00 Oct. 11, 2012  First Version for Public User Manual  Haekyu Park  
						

							 
      
Table of Contents 
1 PRODUCT OVERVIEW ................................................................................. 1-1 
1.1 Introduction .............................................................................................................................................. 1-1 
1.2 Features ................................................................................................................................................... 1-3 
1.3 Block Diagram .......................................................................................................................................... 1-5 
1.4 Product Details ......................................................................................................................................... 1-6 
1.4.1 ARM Core ......................................................................................................................................... 1-7 
1.4.2 Memory Subsystem .......................................................................................................................... 1-8 
1.4.3 Display Subsystem ........................................................................................................................... 1-9 
1.4.4 Camera and General Scaling Subsystem ...................................................................................... 1-11 
1.4.5 Graphics, Multimedia Acceleration Hardware and Image Signal Processor .................................. 1-13 
1.4.6 Security Subsystem ........................................................................................................................ 1-16 
1.4.7 High Speed Interfaces .................................................................................................................... 1-17 
1.4.8 External Peripheral ......................................................................................................................... 1-19 
1.4.9 Modem Interfaces ........................................................................................................................... 1-23 
1.4.10 Low Power Co-Processor ............................................................................................................. 1-24 
1.4.11 System Peripheral ........................................................................................................................ 1-25 
1.4.12 Electrical Characteristics .............................................................................................................. 1-28 
1.4.13 Package Information ..................................................................................................................... 1-29 
2 MEMORY MAP .............................................................................................. 2-1 
2.1 Overview .................................................................................................................................................. 2-1 
2.2 SFR Base Address .................................................................................................................................. 2-1 
3 CHIP ID .......................................................................................................... 3-1 
3.1 Overview .................................................................................................................................................. 3-1 
3.2 Register Description ................................................................................................................................. 3-2 
3.2.1 Register Map Summary .................................................................................................................... 3-2 
4 PAD CONTROL ............................................................................................. 4-1 
4.1 Overview .................................................................................................................................................. 4-1 
4.2 Features ................................................................................................................................................... 4-3 
4.3 Input/Output Description .......................................................................................................................... 4-4 
4.3.1 General Purpose Input/Output Block Diagram ................................................................................. 4-4 
4.4 Register Description ................................................................................................................................. 4-5 
4.4.1 Register Map Summary .................................................................................................................... 4-5 
5 CLOCK CONTROLLER ................................................................................. 5-1 
5.1 Clock Domains ......................................................................................................................................... 5-2 
5.2 Clock Declaration ..................................................................................................................................... 5-4 
5.2.1 Clocks from Clock Pads ................................................................................................................... 5-4 
5.2.2 Clocks from CMU .............................................................................................................................. 5-5 
5.3 Clock Relationship ................................................................................................................................... 5-6 
5.3.1 Recommended PLL PMS Value for APLL, MPLL, BPLL, CPLL and GPLL ................................... 5-10 
5.3.2 Recommended PLL PMS Value for EPLL ...................................................................................... 5-11 
5.3.3 Recommended PLL PMS Value for VPLL ...................................................................................... 5-12 
5.4 Clock Generation ................................................................................................................................... 5-13  
						

							 
      
5.5 Clock Configuration Procedure .............................................................................................................. 5-23 
5.5.1 Clock Gating ................................................................................................................................... 5-25 
5.5.2 Clock Diving .................................................................................................................................... 5-25 
5.6 Special Clock Description ...................................................................................................................... 5-26 
5.6.1 Special Clock Table ........................................................................................................................ 5-26 
5.7 CLKOUT ................................................................................................................................................. 5-28 
5.8 I/O Description ....................................................................................................................................... 5-31 
5.9 Register Description ............................................................................................................................... 5-32 
5.9.1 Register Map Summary .................................................................................................................. 5-34 
6 INTERRUPT CONTROLLER ......................................................................... 6-1 
6.1 Overview .................................................................................................................................................. 6-1 
6.1.1 Features of the Generic Interrupt Controller (GIC) ........................................................................... 6-1 
6.1.2 Implementation-Specific Configurable Features .............................................................................. 6-1 
6.2 Interrupt Source ....................................................................................................................................... 6-2 
6.2.1 Interrupt Sources Connection ........................................................................................................... 6-2 
6.2.2 External GIC Interrupt Table ............................................................................................................. 6-3 
6.3 Register Description ............................................................................................................................... 6-13 
6.3.1 Register Map Summary .................................................................................................................. 6-13 
7 INTERRUPT COMBINER .............................................................................. 7-1 
7.1 Overview .................................................................................................................................................. 7-1 
7.2 Features ................................................................................................................................................... 7-1 
7.3 Interrupt Sources...................................................................................................................................... 7-2 
7.4 Functional Description ............................................................................................................................. 7-7 
7.5 Register Description ................................................................................................................................. 7-8 
7.5.1 Register Map Summary .................................................................................................................... 7-8 
8 DMA (DIRECT MEMORY ACCESS) CONTROLLER .................................... 8-1 
8.1 Overview .................................................................................................................................................. 8-1 
8.2 Features ................................................................................................................................................... 8-2 
8.3 Functional Description ............................................................................................................................. 8-4 
8.3.1 Instruction ......................................................................................................................................... 8-4 
8.4 Register Description ................................................................................................................................. 8-5 
8.4.1 Register Map Summary .................................................................................................................... 8-5 
9 SROM CONTROLLER ................................................................................... 9-1 
9.1 Overview .................................................................................................................................................. 9-1 
9.2 Features ................................................................................................................................................... 9-1 
9.3 Block Diagram .......................................................................................................................................... 9-1 
9.4 Functional Description ............................................................................................................................. 9-2 
9.4.1 nWAIT Pin Operation ........................................................................................................................ 9-2 
9.4.2 Programmable Access Cycle ........................................................................................................... 9-3 
9.5 I/O Description ......................................................................................................................................... 9-5 
9.6 Register Description ................................................................................................................................. 9-6 
9.6.1 Register Map Summary .................................................................................................................... 9-6 
10 PULSE WIDTH MODULATION TIMER ..................................................... 10-1 
10.1 Overview .............................................................................................................................................. 10-1 
10.2 Features ............................................................................................................................................... 10-4  
						

							 
      
10.3 PWM Operation.................................................................................................................................... 10-5 
10.3.1 Prescaler and Divider ................................................................................................................... 10-5 
10.3.2 Basic Timer Operation .................................................................................................................. 10-5 
10.3.3 Auto-Reload and Double Buffering ............................................................................................... 10-7 
10.3.4 Timer Operation ............................................................................................................................ 10-8 
10.3.5 Initialize Timer (Setting Manual-Up Data and Inverter) ................................................................ 10-9 
10.3.6 PW M (Pulse Width Modulation) .................................................................................................... 10-9 
10.3.7 Output Level Control ................................................................................................................... 10-10 
10.3.8 Dead Zone Generator ................................................................................................................. 10-11 
10.4 I/O Description ................................................................................................................................... 10-12 
10.5 Register Description ........................................................................................................................... 10-13 
10.5.1 Register Map Summary .............................................................................................................. 10-13 
11 WATCHDOG TIMER .................................................................................. 11-1 
11.1 Overview .............................................................................................................................................. 11-1 
11.2 Features ............................................................................................................................................... 11-1 
11.3 Functional Description ......................................................................................................................... 11-2 
11.3.1 WDT Operation ............................................................................................................................. 11-2 
11.3.2 WTDAT and WTCNT .................................................................................................................... 11-3 
11.3.3 WDT Start ..................................................................................................................................... 11-3 
11.3.4 Consideration of Debugging Environment .................................................................................... 11-3 
11.4 Register Description ............................................................................................................................. 11-4 
11.4.1 Register Map Summary ................................................................................................................ 11-4 
12 UNIVERSAL ASYNCHRONOUS RECEIVER AND TRANSMITTER ......... 12-1 
12.1 Overview .............................................................................................................................................. 12-1 
12.2 Features ............................................................................................................................................... 12-2 
12.3 UART Description ................................................................................................................................ 12-3 
12.3.1 Data Transmission ........................................................................................................................ 12-3 
12.3.2 Data Reception ............................................................................................................................. 12-3 
12.3.3 Auto Flow Control (AFC) .............................................................................................................. 12-4 
12.3.4 Non Auto-Flow Control (Controlling nRTS and nCTS by Software) ............................................. 12-5 
12.3.5 Interrupt/DMA Request Generation .............................................................................................. 12-6 
12.3.6 UART Error Status FIFO .............................................................................................................. 12-7 
12.4 UART Input Clock .............................................................................................................................. 12-10 
12.5 I/O Description ................................................................................................................................... 12-11 
12.6 Register Description ........................................................................................................................... 12-12 
12.6.1 Register Map Summary .............................................................................................................. 12-12 
13 IIC-BUS INTERFACE ................................................................................ 13-1 
13.1 Overview .............................................................................................................................................. 13-1 
13.2 Features ............................................................................................................................................... 13-3 
13.3 IIC-Bus Interface Operation ................................................................................................................. 13-4 
13.3.1 Start and Stop Conditions ............................................................................................................. 13-4 
13.3.2 Data Transfer Format ................................................................................................................... 13-5 
13.3.3 ACK Signal Transmission ............................................................................................................. 13-6 
13.3.4 Read-Write Operation ................................................................................................................... 13-7 
13.3.5 Bus Arbitration Procedures ........................................................................................................... 13-7 
13.3.6 Abort Conditions ........................................................................................................................... 13-7 
13.3.7 Configuring IIC-Bus ...................................................................................................................... 13-7 
13.3.8 Flowcharts of Operations in Each Mode ...................................................................................... 13-8  
						

							 
      
13.4 I/O Description ................................................................................................................................... 13-13 
13.5 Register Description ........................................................................................................................... 13-14 
13.5.1 Register Map Summary .............................................................................................................. 13-14 
14 SERIAL PERIPHERAL INTERFACE ......................................................... 14-1 
14.1 Overview .............................................................................................................................................. 14-1 
14.2 Features ............................................................................................................................................... 14-1 
14.2.1 Operation of Serial Peripheral Interface ....................................................................................... 14-2 
14.3 SPI Input Clock Description ................................................................................................................. 14-6 
14.4 I/O Description ..................................................................................................................................... 14-7 
14.5 Register Description ............................................................................................................................. 14-8 
14.5.1 Register Map Summary ................................................................................................................ 14-8 
15 DISPLAY CONTROLLER .......................................................................... 15-1 
15.1 Overview .............................................................................................................................................. 15-1 
15.2 Features ............................................................................................................................................... 15-2 
15.3 Functional Description of Display Controller ........................................................................................ 15-4 
15.3.1 Sub-Block ..................................................................................................................................... 15-4 
15.3.2 Data Flow ...................................................................................................................................... 15-4 
15.3.3 Color Data ..................................................................................................................................... 15-7 
15.3.4 Color Space Conversion ............................................................................................................. 15-22 
15.3.5 Palette Usage ............................................................................................................................. 15-24 
15.3.6 Window Blending ........................................................................................................................ 15-26 
15.3.7 Image Enhancement .................................................................................................................. 15-38 
15.3.8 VTIME Controller ........................................................................................................................ 15-39 
15.3.9 Setting of Commands ................................................................................................................. 15-42 
15.3.10 Virtual Display ........................................................................................................................... 15-44 
15.3.11 RGB Interface Specification ..................................................................................................... 15-45 
15.3.12 LCD Indirect i80 System Interface ............................................................................................ 15-47 
15.4 Programmers Model .......................................................................................................................... 15-49 
15.4.1 Overview ..................................................................................................................................... 15-49 
15.5 Register Description ........................................................................................................................... 15-50 
15.5.1 Register Map Summary .............................................................................................................. 15-50 
15.5.2 MIXER Register .......................................................................................................................... 15-56 
15.5.3 Palette Memory (PalRam) ........................................................................................................ 15-114 
15.5.4 Enhancer Register .................................................................................................................... 15-116 
15.5.5 LCDIF Register ......................................................................................................................... 15-117 
16 ANALOG TO DIGITAL CONVERTER (ADC) ............................................ 16-1 
16.1 Overview .............................................................................................................................................. 16-1 
16.2 Features ............................................................................................................................................... 16-1 
16.3 ADC Interface Operation ...................................................................................................................... 16-2 
16.3.1 Block Diagram ADC ...................................................................................................................... 16-2 
16.4 Function Descriptions .......................................................................................................................... 16-3 
16.4.1 A/D Conversion Time.................................................................................................................... 16-3 
16.4.2 ADC conversion Mode .................................................................................................................. 16-3 
16.4.3 Standby Mode ............................................................................................................................... 16-3 
16.4.4 Programming Notes ...................................................................................................................... 16-3 
16.5 ADC Input Clock Diagram .................................................................................................................... 16-4 
16.6 I/O Descriptions.................................................................................................................................... 16-5 
16.7 Register Description ............................................................................................................................. 16-6  
						

							 
      
16.7.1 Register Map Summary ................................................................................................................ 16-6