Fujitsu Series 3 Manual

							 
5. Registers of the Watch Counter 
 
FUJITSU SEMICONDUCTOR LIMITED 
CHAPTER: Watch Counter 
FUJITSU SEMICONDUCTOR CONFIDENTIAL  12 
[bit19:18] CS1 to CS0 : Count clock select bits  These bits select a clock for the watch counter. 
Change these bits when WCCR : WCEN=0 (watch counter operation disabled) and WCOP=0 (watch 
counter stopped). 
bit19 bit18 Explanation 
0 0 Selects WCCK0 as a count clock. 
0  1 Selects WCCK1 as a count clock. 
1  0 Selects WCCK2 as a count clock. 
1  1 Selects WCCK3 as a count clock. 
 
[bit17] WCIE : Interrupt request enable bit  This bit specifies whether to generate an underflow interrupt request when the 6-bit down counter 
underflows (WCIF=1). 
bit Explanation 
0  Disables generation of underflow interrupt requests. 
1 Enables generation of underflow interrupt requests. 
 
[bit16] WCIF : Interrupt request flag bit  This bit becomes 1 when the counter underflows. 
  When this bit and WCIE bit are 1, a watch counter interrupt is generated. 
   When a read-modify-write instruction is used, 1 is read. 
 
bit Explanation 
0  This bit is cleared. 
1 Ignored 
 
CHAPTER  13-2: Watch  Counter 
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 FUJITSU SEMICONDUCTOR LIMITED 
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MB9Axxx/MB9Bxxx  Series  
						

							 
1. Overview 
 
Chapter: Base Timer I/O Select Function 
This chapter explains about base timer I/O function. 
 
1.
 Overview 
2. Configuration 
3. I/O Mode 
4. Registers 
   
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
CODE: 9BFBTSEL-E01.2_FW14-J00.3 
FUJITSU SEMICONDUCTOR LIMITED 
CHAPTER  14-1: Base Timer  I/O Select  Function 
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1. Overview 
 
1. Overview 
The base timer I/O select function sets the I/O mode, and thereby determines the method to 
input and output signals (external clock, external start trigger, and waveform) to/from the base 
timer. 
By switching timer function, each channel of the base timer can be also used as one of the 
following timers: 
- 16-bit PWM timer 
- 16-bit PPG timer 
- 16/32-bit reload timer 
- 16/32-bit PWC timer 
 Overview 
One of the following 9 types of I/O modes can be selected for each 2 channels. 
Software-based simultaneous startup function is provided for multiple channels, enabling up to 16 channels 
to be started up via software. 
  I/O mode 0: Standard 16-bit timer mode 
This mode operates each channel of the base timer individually. 
   I/O mode 1: Timer full mode 
This mode assigns each even channel signal of the base timer with an external pin individually to 
operate the channel. 
   I/O mode 2: Shared external trigger mode 
This mode can input an external trigger to two ch annels of the base timer simultaneously. Using this 
mode, the base timer of two channels can be started up simultaneously. 
   I/O mode 3: Shared channel signal trigger mode 
This mode uses a signal from another channel as  an external startup trigger. This mode cannot be 
selected for channel 0 or 1. 
   I/O mode 4: Timer start/stop mode 
This mode controls the start/stop of the odd channel  using the even channel. The odd channel starts on 
the rising edge of output signal from the even channel, and stops on the falling edge. 
   I/O mode 5: Software-based simultaneous startup mode 
This mode starts up multiple channels simultaneously via software. 
   I/O mode 6: Software-based startup and timer start/stop mode 
This mode controls the start/stop of the odd channel  using the even channel. An even channel is started 
up via software. The odd channel starts on the rising edge of output signal from the even channel, and 
stops on the falling edge. 
   I/O mode 7: Timer start mode 
This mode controls the start of the odd channel usin g the even channel. The odd channel starts on the 
rising edge of output signal from the even channel. 
   I/O mode 8: Shared channel signal trigger and timer start/stop mode 
This mode uses a signal from another channel as  an external startup trigger. This mode cannot be 
selected for channel 0 or 1. 
FUJITSU SEMICONDUCTOR LIMITED 
CHAPTER  14-1: Base Timer  I/O Select  Function 
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2. Configuration 
 
2. Configuration 
The base timer I/O select function consists of the following blocks. 
 Block diagram 
Figure 2-1  shows the block diagram of the base timer I/O select function. 
 
Figure 2-1 Block diagram of base timer I/O select function 
 
Internal bus
Registers
Base timer  ch.3
Base timer  ch.2
Base timer  ch.1
Base timer  ch.0
I/O select
TIOA0 TIOB0 TIOA1 TIOB1 TIOA2 TIOB2 TIOA3 TIOB3
Base timer ch.15
TIOA15
TIOB15
Base timer
I/O Select function
  
 
  I/O select 
A circuit that selects the I/O mode of  the base timer for each channel. 
   Base timer (Channels 0 to 15) 
Base timer channels 0 to 15 (up to 16 channels). 
   Registers 
Registers of base timer I/O select function. 
 
FUJITSU SEMICONDUCTOR LIMITED 
CHAPTER  14-1: Base Timer  I/O Select  Function 
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3. I/O Mode 
 
3. I/O Mode 
This section explains pins used by the base timer I/O select function to set the I/O mode, and 
also explains each I/O mode. 
3.1 Pins 
3.2  I/O mode 
 
FUJITSU SEMICONDUCTOR LIMITED 
CHAPTER  14-1: Base Timer  I/O Select  Function 
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3. I/O Mode 
 
3.1. Pins 
This section explains pins used by the base timer I/O select function to set the I/O mode. 
Each channel of the base timer has 2 types of external pins and 5 types of internal signals. Also base timer 
I/O select function has 2 types of internal signals. By connecting an internal signal with an external pin, the 
signal corresponding to the connected (external clock (ECK signal)/external startup trigger (TGIN 
signal)/waveform (TIN signal)) is input or output to/from the base timer. The external pin and internal 
signal can be connected by setting the I/O mode of the base timer. The pin used and the signal input or 
output differ depending on the I/O mode. 
  External pins 
  TIOA pin 
This pin is used to output the base timer waveform  (TOUT signal), or input an external startup trigger 
(TGIN signal). 
   TIOB pin 
This pin is used to input external startup trigger (TGIN signal)/external clock (ECK signal)/another 
channel waveform (TIN signal). 
  Internal signals 
A signal is input or output to/from the base timer by being connected with an above external pin, or by 
inputting an output signal from another channel. 
  TOUT signal 
This signal is the output waveform of the base timer. (Not used by the 16/32-bit PWC timer.) 
   ECK signal 
This signal is an external clock of the base timer. (Not used by the 16/32-bit PWC timer.) 
It is input when the external cloc k is selected as a counting clock. 
   TGIN signal 
This signal is the external startup trigger of the base timer. (Not used by the 16/32-bit PWC timer.) 
When the valid edge of external startup trigger is se lected, the base timer detects the edge of this signal 
to start up. 
   TIN signal 
This signal is the input waveform of the base timer.  This signal is the waveform to be measured. (Used 
only by the 16/32-bit PWC timer.) 
   DTRG signal 
This signal is the trigger input to the base timer. Th e base timer stops operating on the falling edge of 
this signal. 
   COUT signal 
This signal is the trigger output of the base timer I/O select function. This signal is output to another 
channel. 
   CIN signal 
This signal is the trigger input to the base timer I/O select function. This signal is input from another 
channel. 
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CHAPTER  14-1: Base Timer  I/O Select  Function 
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3. I/O Mode 
 
 Connecting the external pin to the internal signal 
The external pin and internal signal can be connected by setting the I/O mode of the base timer. 
Ta b l e  3 - 1  shows the correspondence between I/O modes and pin connections. 
Table 3-1 Correspondence between I/O modes and pin connections 
TIOAn 
(Even channel)  TIOBn 
(Even channel)  TIOAn+1 
(Odd channel)  TIOBn+1 
(Odd channel) 
I/O 
mode 
Connected to I/O Connected toI/O Connected toI/O Connected to I/O 
0 Ch.n TOUT  Output Ch.n 
ECK/TGIN/ 
TIN  Input
Ch.n+1 
TOUT  OutputCh.n+1 
ECK/TGIN/ 
TIN  Input
1 
Ch.n TOUT  Output Ch.n ECK  InputCh.n TGIN  InputCh.n TIN  Input
2 Ch.n TOUT  Output Ch.n/Ch.n+1 
ECK/TGIN/ 
TIN *1  Input
Ch.n+1 
TOUT  Output
3 Ch.n TOUT 
Output Not used  Ch.n+1 
TOUT Output
4 Ch.n TOUT 
Output Ch.n 
ECK/TGIN/ 
TIN  Input
Ch.n+1 
TOUT  Output
5 Ch.n TOUT 
Output  Ch.n+1 
TOUT Output
6 Ch.n TOUT 
Output Not used 
Ch.n+1 
TOUT Output
7 Ch.n TOUT 
Output Ch.n 
ECK/TGIN/ 
TIN  Input
Ch.n+1 
TOUT  Output
8 Ch.n TOUT 
Output Not used  Ch.n+1 
TOUT OutputNot used 
n : Even 
Ch.n  : Even channel 
Ch.n+1  : Odd channel 
*1  : Synchronized by the peripheral clock (PCLK) 
 
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CHAPTER  14-1: Base Timer  I/O Select  Function 
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3. I/O Mode 
 
3.2. I/O mode 
I/O mode selected by the I/O Select Register (BTSEL) determines the functions of external 
pins and the start/stop timing of the base timer. 
 I/O mode 0 (Standard 16-bit timer mode) 
This mode uses each channel of the base timer individually. 
Ta b l e  3 - 2  shows the external pins used when this mode is selected. 
Table 3-2 External pins used when I/O mode 0 is selected. 
 Even channel Odd channel 
Number of input pins  1 1 
Number of output pins  1 1 
 
Ta b l e  3 - 3  shows the internal signals to which the external pins connect, and signals input or output. 
Table 3-3 External pin connections and input/output signals when I/O mode 0 is selected. 
External pin  I/O Connected to   
(internal signal)  Signal input/output 
TIOA 
Output TOUT  Outputs the base timer waveform 
TIOB Input ECK/TGIN/TIN*  Uses the input signal as one of the following signals: 

  External clock (ECK signal) 
   External startup trigger (TGIN signal) 
   Waveform to be measured (TIN signal) 
* :  The usage of input signals (ECK/TGIN/TIN) differs depending on the Timer Control Register (TMCR) 
setting of the base timer. 
  Figure 3-1  provides the block diagram of I/O mode 0 (Standard 16-bit timer mode). 
Figure 3-1 I/O mode 0 (Standard 16-bit timer mode) block diagram  
ECK
TGIN TIN
TOUT
ECK
TGIN
TIN
TOUT
Base timer   Ch.n+1
Base timer   Ch.nTIOBn+1
TIOAn+1
TIOBn
TIOAn
n: Even  
Ta b l e  3 - 4
 shows signal connections in I/O mode 0. 
Table 3-4 I/O mode 0 signal connections 
Signal Connected to 
Ch.n TOUT signal  Output from the TIOAn pin 
Input signal from the TIOBn pin Input to Ch.n as ECK/TGIN/TIN signals 
Ch.n+1 TOUT signal  Output from the TIOAn+1 pin 
Input signal from the TIOBn+1 pin Input to Ch.n+1 as ECK/TGIN/TIN signals 
n : Even 
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CHAPTER  14-1: Base Timer  I/O Select  Function 
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3. I/O Mode 
 
 I/O mode 1 (timer full mode) 
This mode assigns every even channel signal with an external pin individually. 
Ta b l e  3 - 5  shows the external pins used when this mode is selected. 
Table 3-5 External pins used when I/O mode 1 is selected. 
 Even channel 
Number of input pins  3 
Number of output pins  1 
 
Ta b l e  3 - 6  shows the internal signals to which the external pins connect, and signals input or output. 
Table 3-6 External pin connections and input/output signals when I/O mode 1 is selected. 
External pin  I/O Connected to   
(internal signal)  Signal input/output 
TIOAn 
Output Even channel TOUT  Outputs the even channel waveform 
TIOBn Input Even channel ECK  Inputs an external clock 
(ECK signal) to the even 
channel. 
TIOAn+1 Input  Even channel TGIN  Inputs an external startup 
trigger (TGIN signal) to the 
even channel. 
TIOBn+1 Input  Even channel TIN  Inputs the waveform to be measured (TIN signal) to the 
even channel. 
n : Even 
 
Figure 3-2  shows the block diagram of I/O mode 1 (timer full mode). 
Figure 3-2 I/O mode 1 (timer full mode) block diagram 
 
ECK
TGIN TIN
TOUT
Base timer    Ch.n+1
Base timer    Ch.n
TIOBn+1
TIOAn+1
TIOBn
TIOAn(in 32-bit mode)
n: Even
  
  Ta b l e  3 - 7  shows signal connections in I/O mode 1. 
Table 3-7 I/O mode 1 signal connections 
Signal Connected to 
Ch.n TOUT signal  Output from the TIOAn pin 
Input signal from the TIOBn pin Input to Ch.n as a TIN signal 
Ch.n+1 TOUT signal  Input to Ch.n as a TGIN signal 
TIOBn+1 pin Input to Ch.n as an ECK signal 
n : Even 
 
When  t

his mode is selected, the TIOA pins (TIOA1,  TIOA3, etc.) correspondi
 ng to the even channel must 
be set to port input mode with the Port Function Register (PFR) of GPIO. 
 
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CHAPTER  14-1: Base Timer  I/O Select  Function 
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